/**
 @file ctc_chip_cli.c

 @date 2012-07-09

 @version v2.0

---file comments----
*/

/****************************************************************
 *
 * Header Files
 *
 ***************************************************************/
#include "sal.h"
#include "ctc_cli.h"
#include "ctc_cli_common.h"
#include "ctc_const.h"
#include "ctc_api.h"
#include "ctcs_api.h"
#include "ctc_debug.h"
#include "ctc_error.h"
#include "ctc_chip.h"
#include "dal.h"



#define PRINT_CAPABLITY(c)                                                   \
if (0xFFFFFFFF == capability[CTC_GLOBAL_CAPABILITY_##c])                     \
{                                                                            \
    ctc_cli_out("%-30s : -\n", #c);                                          \
}                                                                            \
else                                                                         \
{                                                                            \
    ctc_cli_out("%-30s : %d\n", #c, capability[CTC_GLOBAL_CAPABILITY_##c]);  \
}

CTC_CLI(ctc_cli_chip_show_chip_clock,
        ctc_cli_chip_show_chip_clock_cmd,
        "show chip clock frequence",
        "Show",
        "Chip",
        "Clock",
        "Frequence")
{
    int32 ret = CLI_SUCCESS;
    uint16 freq = 0;

    if(g_ctcs_api_en)
    {
        ret = ctcs_get_chip_clock(g_api_ldev, &freq);
    }
    else
    {
        ret = ctc_get_chip_clock(&freq);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("The chip clock freq is: %uM\n", freq);

    return ret;
}

CTC_CLI(ctc_cli_chip_phy_scan_para,
        ctc_cli_chip_phy_scan_para_cmd,
        "chip phy-scan para {(gebitmap0 GE_BITMAP0 gebitmap1 GE_BITMAP1) | (xgbitmap0 XG_BITMAP0 xgbitmap1 XG_BITMAP1) |   \
        (phybitmap0 BITMAP0 phybitmap1 BITMAP1) mdio-ctlr-type VALUE mdio-ctlr-id ID| \
        (interval INTERVAL) | (xglinkmask LINK_MASK) | (twice (enable | disable)) | control-id ID | usephy0 USEPHY0 usephy1 USEPHY1 }",
        "Chip module",
        "Auto scan operate",
        "Scan parameter",
        "Ge phy bit map0",
        "Bit map0 value",
        "Ge phy bit map1",
        "Bit map1 value",
        "Xg phy bit map0",
        "Bit map0 value",
        "Xg phy bit map1",
        "Bit map1 value",
        "Phy bit map0",
        "Bit map0 value",
        "Phy bit map1",
        "Bit map1 value",
        "MDIO controller type",
        "Value <0 - 1>",
        "MDIO controller ID",
        "ID",
        "Scan interval",
        "Interval value",
        "Xg phy device link mask",
        "Mask value",
        "Xgphy scan twince",
        "Enable",
        "Disable",
        "Control-id",
        "ID",
        "Use phy 0",
        "Use phy 0 value",
        "Use phy 1",
        "Use phy 1 value")
{
    int32 ret       = CLI_SUCCESS;
    ctc_chip_phy_scan_ctrl_t scan_para;
    uint8 index = 0;

    sal_memset(&scan_para, 0, sizeof(ctc_chip_phy_scan_ctrl_t));

    index = CTC_CLI_GET_ARGC_INDEX("gebitmap0");
    if (index != 0xFF)
    {
        if (index + 1 >= argc)
        {
            ctc_cli_out("%% Insufficient  param \n\r");
            return CLI_ERROR;
        }

        CTC_CLI_GET_UINT32_RANGE("gebitmap0", scan_para.scan_gephy_bitmap0, argv[index + 1], 0, CTC_MAX_UINT32_VALUE);
        scan_para.op_flag |= CTC_CHIP_GE_BITMAP_OP;
    }

    index = CTC_CLI_GET_ARGC_INDEX("gebitmap1");
    if (index != 0xFF)
    {
        if (index + 1 >= argc)
        {
            ctc_cli_out("%% Insufficient  param \n\r");
            return CLI_ERROR;
        }

        CTC_CLI_GET_UINT32_RANGE("gebitmap1", scan_para.scan_gephy_bitmap1, argv[index + 1], 0, CTC_MAX_UINT32_VALUE);
        scan_para.op_flag |= CTC_CHIP_GE_BITMAP_OP;
    }

    index = CTC_CLI_GET_ARGC_INDEX("xgbitmap0");
    if (index != 0xFF)
    {
        if (index + 1 >= argc)
        {
            ctc_cli_out("%% Insufficient  param \n\r");
            return CLI_ERROR;
        }

        CTC_CLI_GET_UINT8_RANGE("xgbitmap0", scan_para.scan_xgphy_bitmap0, argv[index + 1], 0, CTC_MAX_UINT8_VALUE);
        scan_para.op_flag |= CTC_CHIP_XG_BITMAP_OP;
    }

    index = CTC_CLI_GET_ARGC_INDEX("xgbitmap1");
    if (index != 0xFF)
    {
        if (index + 1 >= argc)
        {
            ctc_cli_out("%% Insufficient  param \n\r");
            return CLI_ERROR;
        }

        CTC_CLI_GET_UINT8_RANGE("xgbitmap1", scan_para.scan_xgphy_bitmap1, argv[index + 1], 0, CTC_MAX_UINT8_VALUE);
        scan_para.op_flag |= CTC_CHIP_XG_BITMAP_OP;
    }

    index = CTC_CLI_GET_ARGC_INDEX("phybitmap0");
    if (index != 0xFF)
    {
        if (index + 1 >= argc)
        {
            ctc_cli_out("%% Insufficient  param \n\r");
            return CLI_ERROR;
        }

        CTC_CLI_GET_UINT32_RANGE("phybitmap0", scan_para.scan_phy_bitmap0, argv[index + 1], 0, CTC_MAX_UINT32_VALUE);
        scan_para.op_flag |= CTC_CHIP_PHY_BITMAP_OP;
    }

    index = CTC_CLI_GET_ARGC_INDEX("phybitmap1");
    if (index != 0xFF)
    {
        if (index + 1 >= argc)
        {
            ctc_cli_out("%% Insufficient  param \n\r");
            return CLI_ERROR;
        }

        CTC_CLI_GET_UINT32_RANGE("phybitmap1", scan_para.scan_phy_bitmap1, argv[index + 1], 0, CTC_MAX_UINT32_VALUE);
        scan_para.op_flag |= CTC_CHIP_PHY_BITMAP_OP;
    }

    index = CTC_CLI_GET_ARGC_INDEX("usephy0");
    if (index != 0xFF)
    {
        CTC_CLI_GET_UINT32("usephy0", scan_para.mdio_use_phy0, argv[index + 1]);
        scan_para.op_flag |= CTC_CHIP_USE_PHY_OP;
    }

    index = CTC_CLI_GET_ARGC_INDEX("usephy1");
    if (index != 0xFF)
    {
        CTC_CLI_GET_UINT32("usephy1", scan_para.mdio_use_phy1, argv[index + 1]);
        scan_para.op_flag |= CTC_CHIP_USE_PHY_OP;
    }

    index = CTC_CLI_GET_ARGC_INDEX("mdio-ctlr-type");
    if (index != 0xFF)
    {
        if (index + 1 >= argc)
        {
            ctc_cli_out("%% Insufficient  param \n\r");
            return CLI_ERROR;
        }

        CTC_CLI_GET_UINT8_RANGE("mdio-ctlr-type", scan_para.mdio_ctlr_type, argv[index + 1], 0, CTC_MAX_UINT8_VALUE);
    }

    index = CTC_CLI_GET_ARGC_INDEX("mdio-ctlr-id");
    if (index != 0xFF)
    {
        if (index + 1 >= argc)
        {
            ctc_cli_out("%% Insufficient  param \n\r");
            return CLI_ERROR;
        }

        CTC_CLI_GET_UINT8_RANGE("mdio-ctlr-id", scan_para.mdio_ctlr_id, argv[index + 1], 0, CTC_MAX_UINT8_VALUE);
    }

    index = CTC_CLI_GET_ARGC_INDEX("interval");
    if (index != 0xFF)
    {
        if (index + 1 >= argc)
        {
            ctc_cli_out("%% Insufficient  param \n\r");
            return CLI_ERROR;
        }

        CTC_CLI_GET_UINT32_RANGE("interval", scan_para.scan_interval, argv[index + 1], 0, CTC_MAX_UINT32_VALUE);
        scan_para.op_flag |= CTC_CHIP_INTERVAL_OP;
    }

    index = CTC_CLI_GET_ARGC_INDEX("xglinkmask");
    if (index != 0xFF)
    {
        if (index + 1 >= argc)
        {
            ctc_cli_out("%% Insufficient  param \n\r");
            return CLI_ERROR;
        }

        CTC_CLI_GET_UINT8_RANGE("xglinkmask", scan_para.xgphy_link_bitmask, argv[index + 1], 0, CTC_MAX_UINT8_VALUE);
        scan_para.op_flag |= CTC_CHIP_XG_LINK_MASK_OP;
    }

    index = CTC_CLI_GET_ARGC_INDEX("twice");
    if (index != 0xFF)
    {
        if (index + 1 >= argc)
        {
            ctc_cli_out("%% Insufficient  param \n\r");
            return CLI_ERROR;
        }

        if (CLI_CLI_STR_EQUAL("enable", index + 1))
        {
            scan_para.xgphy_scan_twice = 1;
        }
        else
        {
            scan_para.xgphy_scan_twice = 0;
        }

        scan_para.op_flag |= CTC_CHIP_XG_TWICE_OP;
    }

    index = CTC_CLI_GET_ARGC_INDEX("control-id");
    if (index != 0xFF)
    {
        if (index + 1 >= argc)
        {
            ctc_cli_out("%% Insufficient  param \n\r");
            return CLI_ERROR;
        }

        CTC_CLI_GET_UINT8_RANGE("control-id", scan_para.ctl_id, argv[index + 1], 0, CTC_MAX_UINT8_VALUE);
    }

    if(g_ctcs_api_en)
    {
        ret = ctcs_chip_set_phy_scan_para(g_api_ldev, &scan_para);
    }
    else
    {
        ret = ctc_chip_set_phy_scan_para(&scan_para);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;

}

CTC_CLI(ctc_cli_chip_phy_scan_en,
        ctc_cli_chip_phy_scan_en_cmd,
        "chip phy-scan (enable | disable)",
        "Chip module",
        "Phy scan",
        "Scan enable",
        "Scan disable")
{
    int32 ret       = CLI_SUCCESS;
    bool enable;

    if (CLI_CLI_STR_EQUAL("enable", 0))
    {
        enable = TRUE;
    }
    else
    {
        enable = FALSE;
    }

    if(g_ctcs_api_en)
    {
        ret = ctcs_chip_set_phy_scan_en(g_api_ldev, enable);
    }
    else
    {
        ret = ctc_chip_set_phy_scan_en(enable);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;

}

CTC_CLI(ctc_cli_chip_read_i2c,
        ctc_cli_chip_read_i2c_cmd,
        "chip read i2c (control-id ID |) (switch-id ID |) \
        (slave-id ID dev-addr ADDR offset OFF length LEN) (access-switch|) ",
        "Chip module",
        "Read operate",
        "I2c master id",
        "<0 - 1>",
        "I2c control id",
        "I2c switch id",
        "Set according to hardware, 0 - disable",
        "I2c slave id",
        "<0 - 95>",
        "I2c slave address",
        "ADDR",
        "I2c slave offset",
        "OFFSET",
        "Read value length",
        "LENGTH",
        "Access i2c switch")
{
    int32 ret = CLI_SUCCESS;
    ctc_chip_i2c_read_t i2c_para;
    uint8 index = 0;
    

    sal_memset(&i2c_para, 0, sizeof(ctc_chip_i2c_read_t));
    index = CTC_CLI_GET_ARGC_INDEX("control-id");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT8("control-id", i2c_para.ctl_id, argv[index + 1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("switch-id");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT8("switch-id", i2c_para.i2c_switch_id , argv[index + 1]);
    }



    index = CTC_CLI_GET_ARGC_INDEX("slave-id");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT8("slave-id", i2c_para.slave_dev_id , argv[index + 1]);
        i2c_para.slave_bitmap = (0x1 << i2c_para.slave_dev_id);
    }

    index = CTC_CLI_GET_ARGC_INDEX("dev-addr");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT16("dev-addr", i2c_para.dev_addr , argv[index + 1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("offset");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT8("offset", i2c_para.offset , argv[index + 1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("length");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT8("length", i2c_para.length , argv[index + 1]);
    }
    index = CTC_CLI_GET_ARGC_INDEX("access-switch");
    if (0xFF != index)
    {
        i2c_para.access_switch = 1;
    }
    i2c_para.lchip = g_api_ldev;
    i2c_para.buf_length = i2c_para.length;

    i2c_para.p_buf = (uint8*)mem_malloc(MEM_CLI_MODULE, i2c_para.buf_length);
    if (NULL == i2c_para.p_buf)
    {
        return CLI_ERROR;
    }

    if(g_ctcs_api_en)
    {
        ret = ctcs_chip_i2c_read(g_api_ldev, &i2c_para);
    }
    else
    {
       ret = ctc_chip_i2c_read(&i2c_para);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        mem_free(i2c_para.p_buf);
        i2c_para.p_buf = NULL;
        return CLI_ERROR;
    }

    ctc_cli_out("Dev %d Data: \n", i2c_para.slave_dev_id);

    for (index = 0; index < i2c_para.buf_length; index++)
    {
        if (((index % 16) == 0) && (index != 0))
        {
            ctc_cli_out("\n");
        }

         ctc_cli_out("  0x%02x", i2c_para.p_buf[index]);
    }

    ctc_cli_out("\n");

    mem_free(i2c_para.p_buf);
    i2c_para.p_buf = NULL;

    return ret;

}

CTC_CLI(ctc_cli_chip_write_i2c,
        ctc_cli_chip_write_i2c_cmd,
        "chip write i2c (control-id ID |) (switch-id ID|) (slave-id ID \
        dev-addr ADDR offset OFFSET value VALUE) (access-switch|)",
        "Chip module",
        "Write operate",
        "I2c device",
        "I2c master id",
        "Id",
        "I2c switch id",
        "I2c switch id according to hardware, 0 - disable",
        "I2c slave id",
        "Id",
        "Slave dev address",
        "Address",
        "Offset",
        "Offset",
        "Write value",
        "Value",
        "Access i2c switch")
{
    int32 ret       = CLI_SUCCESS;
    uint8 index = 0;
    ctc_chip_i2c_write_t i2c_para;
    

    sal_memset(&i2c_para, 0, sizeof(ctc_chip_i2c_write_t));

    index = CTC_CLI_GET_ARGC_INDEX("value");
    if (index != 0xFF)
    {
        CTC_CLI_GET_UINT8("value", i2c_para.data, argv[index + 1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("offset");
    if (index != 0xFF)
    {
        CTC_CLI_GET_UINT8("offset", i2c_para.offset, argv[index + 1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("dev-addr");
    if (index != 0xFF)
    {
        CTC_CLI_GET_UINT16("dev-addr", i2c_para.dev_addr, argv[index + 1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("slave-id");
    if (index != 0xFF)
    {
        CTC_CLI_GET_UINT8("slave-id", i2c_para.slave_id, argv[index + 1]);
    }



    index = CTC_CLI_GET_ARGC_INDEX("control-id");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT8("control-id", i2c_para.ctl_id, argv[index + 1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("switch-id");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT8("switch-id", i2c_para.i2c_switch_id , argv[index + 1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("access-switch");
    if (0xFF != index)
    {
        i2c_para.access_switch = 1;
    }
    i2c_para.lchip = g_api_ldev;
    if(g_ctcs_api_en)
    {
        ret = ctcs_chip_i2c_write(g_api_ldev, &i2c_para);
    }
    else
    {
       ret = ctc_chip_i2c_write(&i2c_para);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;

}

CTC_CLI(ctc_cli_chip_i2c_scan_para,
        ctc_cli_chip_i2c_scan_para_cmd,
        "chip i2c-scan para (control-id ID |) (switch-id ID |) (chip-id ID |) \
        {(dev-addr ADDR offset OFF length LEN) | (bitmap MAP0 MAP1) (interval ITVL)}",
        "Chip module",
        "Auto scan operate",
        "Scan parameter",
        "I2c control id",
        "<0 - 1>",
        "I2c switch id",
        "<1 - 16>, 0 - disable",
        "local chip id",
        "ID",
        "I2c slave address",
        "ADDR",
        "I2c slave offset",
        "OFFSET",
        "Length",
        "LENGTH",
        "Bitmap",
        "Indicate <0-31>",
        "Indicate <32-63>",
        "Interval",
        "INTERVAL")
{
    int32 ret       = CLI_SUCCESS;
    ctc_chip_i2c_scan_t scan_para;
    uint8 index = 0;
	uint8 lchip = 0;

    sal_memset(&scan_para, 0, sizeof(ctc_chip_i2c_scan_t));
    
    index = CTC_CLI_GET_ARGC_INDEX("control-id");
    if (index != 0xFF)
    {
        CTC_CLI_GET_UINT8("control-id", scan_para.ctl_id, argv[index + 1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("switch-id");
    if (index != 0xFF)
    {
        CTC_CLI_GET_UINT8("switch-id", scan_para.i2c_switch_id, argv[index + 1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("chip-id");
    if (index != 0xFF)
    {
        CTC_CLI_GET_UINT8("chip-id", lchip, argv[index + 1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("dev-addr");
    if (index != 0xFF)
    {
        if (index + 1 >= argc)
        {
            ctc_cli_out("%% Insufficient  param \n\r");
            return CLI_ERROR;
        }

        CTC_CLI_GET_UINT16_RANGE("dev-addr", scan_para.dev_addr, argv[index + 1], 0, CTC_MAX_UINT16_VALUE);
        scan_para.op_flag |= CTC_CHIP_SFP_SCAN_REG_OP;
    }

    index = CTC_CLI_GET_ARGC_INDEX("offset");
    if (index != 0xFF)
    {
        if (index + 1 >= argc)
        {
            ctc_cli_out("%% Insufficient  param \n\r");
            return CLI_ERROR;
        }

        CTC_CLI_GET_UINT8_RANGE("offset", scan_para.offset, argv[index + 1], 0, CTC_MAX_UINT8_VALUE);
        scan_para.op_flag |= CTC_CHIP_SFP_SCAN_REG_OP;
    }

    index = CTC_CLI_GET_ARGC_INDEX("length");
    if (index != 0xFF)
    {
        if (index + 1 >= argc)
        {
            ctc_cli_out("%% Insufficient  param \n\r");
            return CLI_ERROR;
        }

        CTC_CLI_GET_UINT8_RANGE("length", scan_para.length, argv[index + 1], 0, CTC_MAX_UINT8_VALUE);
        scan_para.op_flag |= CTC_CHIP_SFP_SCAN_REG_OP;
    }

    index = CTC_CLI_GET_ARGC_INDEX("bitmap");
    if (index != 0xFF)
    {
        if (index + 1 >= argc)
        {
            ctc_cli_out("%% Insufficient  param \n\r");
            return CLI_ERROR;
        }

        CTC_CLI_GET_UINT32_RANGE("bitmap", scan_para.slave_bitmap[0], argv[index + 1], 0, CTC_MAX_UINT32_VALUE);
        CTC_CLI_GET_UINT32_RANGE("bitmap", scan_para.slave_bitmap[1], argv[index + 2], 0, CTC_MAX_UINT32_VALUE);
        scan_para.op_flag |= CTC_CHIP_SFP_BITMAP_OP;
    }

    index = CTC_CLI_GET_ARGC_INDEX("interval");
    if (index != 0xFF)
    {
        if (index + 1 >= argc)
        {
            ctc_cli_out("%% Insufficient  param \n\r");
            return CLI_ERROR;
        }

        CTC_CLI_GET_UINT32_RANGE("interval", scan_para.interval, argv[index + 1], 0, CTC_MAX_UINT32_VALUE);
        scan_para.op_flag |= CTC_CHIP_SFP_INTERVAL_OP;
    }
    scan_para.lchip = g_api_ldev;
    if(g_ctcs_api_en)
    {
        ret = ctcs_chip_set_i2c_scan_para(g_api_ldev, &scan_para);
    }
    else
    {
       ret = ctc_chip_set_i2c_scan_para(&scan_para);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;

}

CTC_CLI(ctc_cli_chip_i2c_scan_en,
        ctc_cli_chip_i2c_scan_en_cmd,
        "chip i2c-scan (enable | disable)",
        "Chip module",
        "I2c scan",
        "Scan enable",
        "Scan disable")
{
    int32 ret       = CLI_SUCCESS;
    bool enable;

    if (CLI_CLI_STR_EQUAL("enable", 0))
    {
        enable = TRUE;
    }
    else
    {
        enable = FALSE;
    }

    if(g_ctcs_api_en)
    {
        ret = ctcs_chip_set_i2c_scan_en(g_api_ldev, enable);
    }
    else
    {
       ret = ctc_chip_set_i2c_scan_en(enable);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;

}

CTC_CLI(ctc_cli_chip_read_i2c_buffer,
        ctc_cli_chip_read_i2c_buffer_cmd,
        "chip read i2c-buffer gchip CHIP_ID length LENGTH i2c-id I2C_ID",
        "Chip module",
        "Read operate",
        "I2c device buffer",
        "Local chip id",
        "Global chip id value",
        "Buffer length",
        "length value",
        "i2c_id",
        "slice id")
{
    int32 ret       = CLI_SUCCESS;
    uint32 length = 0;
    uint32 index = 0;
    ctc_chip_i2c_scan_read_t i2c_scan_read = {0};

    CTC_CLI_GET_UINT8_RANGE("gchip", i2c_scan_read.gchip, argv[0], 0, CTC_MAX_UINT8_VALUE);
    CTC_CLI_GET_UINT32_RANGE("length", length, argv[1], 0, CTC_MAX_UINT32_VALUE);
    CTC_CLI_GET_UINT8_RANGE("i2c-id", i2c_scan_read.ctl_id, argv[2], 0, CTC_MAX_UINT8_VALUE);

    i2c_scan_read.p_buf = (uint8*)mem_malloc(MEM_CLI_MODULE, length);
    if (NULL == i2c_scan_read.p_buf)
    {
        return CLI_ERROR;
    }
    i2c_scan_read.len = length;

    if(g_ctcs_api_en)
    {
        ret = ctcs_chip_read_i2c_buf(g_api_ldev, &i2c_scan_read);
    }
    else
    {
       ret = ctc_chip_read_i2c_buf(&i2c_scan_read);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        mem_free(i2c_scan_read.p_buf);
        i2c_scan_read.p_buf = NULL;
        return CLI_ERROR;
    }

    for (index = 0; index < i2c_scan_read.len; index++)
    {
        if (((index % 16) == 0) && (index != 0))
        {
            ctc_cli_out("\n");
        }
        ctc_cli_out("  0x%02x", i2c_scan_read.p_buf[index]);
    }
    ctc_cli_out("\n");

    mem_free(i2c_scan_read.p_buf);
    i2c_scan_read.p_buf = NULL;

    return ret;

}

CTC_CLI(ctc_cli_chip_i2c_clock_frequency,
        ctc_cli_chip_i2c_clock_frequency_cmd,
        "chip i2c control-id ID freq FREQ ",
        "Chip module",
        "I2c master",
        "Control id",
        "Control id value",
        "I2c clock frequency",
        "Frequency value(K)")
{
    int32 ret       = CLI_SUCCESS;
    uint8 ctl_id = 0;
    uint16 freq = 0;
    ctc_chip_peri_clock_t peri_clock;

    CTC_CLI_GET_UINT8("contrl id", ctl_id, argv[0]);
    CTC_CLI_GET_UINT16("freq", freq, argv[1]);



    sal_memset(&peri_clock, 0, sizeof(ctc_chip_peri_clock_t));
    peri_clock.type = CTC_CHIP_PERI_I2C_TYPE;
    peri_clock.ctl_id = ctl_id;
    peri_clock.clock_val = freq;
    if(g_ctcs_api_en)
    {
         ret = ctcs_chip_set_property(g_api_ldev, CTC_CHIP_PROP_PERI_CLOCK, &peri_clock);
    }
    else
    {
        ret = ctc_chip_set_property(g_api_ldev, CTC_CHIP_PROP_PERI_CLOCK, &peri_clock);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;
}

CTC_CLI(ctc_cli_chip_show_i2c_clock_frequency,
        ctc_cli_chip_show_i2c_clock_frequency_cmd,
        "show chip i2c control-id ID freq ",
        "Show",
        "Chip module",
        "I2c",
        "Control id",
        "Control id value",
        "I2c clock frequency")
{
    int32 ret       = CLI_SUCCESS;
    uint8 ctl_id = 0;
    ctc_chip_peri_clock_t peri_clock;

    CTC_CLI_GET_UINT8("contrl id", ctl_id, argv[0]);



    sal_memset(&peri_clock, 0, sizeof(ctc_chip_peri_clock_t));
    peri_clock.type = CTC_CHIP_PERI_I2C_TYPE;
    peri_clock.ctl_id = ctl_id;
    if(g_ctcs_api_en)
    {
         ret = ctcs_chip_get_property(g_api_ldev, CTC_CHIP_PROP_PERI_CLOCK, &peri_clock);
    }
    else
    {
        ret = ctc_chip_get_property(g_api_ldev, CTC_CHIP_PROP_PERI_CLOCK, &peri_clock);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("I2c clock frequency is %u Khz \n", peri_clock.clock_val);

    return ret;
}

CTC_CLI(ctc_cli_chip_mac_led_mode,
        ctc_cli_chip_mac_led_mode_cmd,
        "chip mac-led para port-id PORT_ID mode MODE { (polarity POLARITY) | \
        ((first-mode FISRT_MODE) (sec-mode SEC_MODE |)) | control-id ID | lport-en |} ",
        "Chip module",
        "Mac led ",
        "Parameter",
        "Port id",
        "Mac id or Lport",
        "Mac led mode",
        "<0-1>",
        "Polarity",
        "Polarity value",
        "First led mode",
        "First mode value",
        "Second led mode",
        "Second mode value",
        "Control-id",
        "<0 - 1>",
        "Lport enable")
{
    int32 ret       = CLI_SUCCESS;
    ctc_chip_led_para_t led_para;
    ctc_chip_mac_led_type_t led_type;
    uint8 index = 0;
    

    sal_memset(&led_para, 0, sizeof(ctc_chip_led_para_t));

    CTC_CLI_GET_UINT32("gport", led_para.port_id, argv[0]);

    CTC_CLI_GET_UINT32_RANGE("mode", led_type, argv[1], 0, CTC_MAX_UINT32_VALUE);

    index = CTC_CLI_GET_ARGC_INDEX("polarity");
    if (index != 0xFF)
    {
        if (index + 1 >= argc)
        {
            ctc_cli_out("%% Insufficient  param \n\r");
            return CLI_ERROR;
        }

        CTC_CLI_GET_UINT32_RANGE("polarity", led_para.polarity, argv[index + 1], 0, CTC_MAX_UINT32_VALUE);
        led_para.op_flag |= CTC_CHIP_LED_POLARITY_SET_OP;
    }

    index = CTC_CLI_GET_ARGC_INDEX("first-mode");
    if (index != 0xFF)
    {
        if (index + 1 >= argc)
        {
            ctc_cli_out("%% Insufficient  param \n\r");
            return CLI_ERROR;
        }

        CTC_CLI_GET_UINT32_RANGE("first-mode", led_para.first_mode, argv[index + 1], 0, CTC_MAX_UINT32_VALUE);
        led_para.op_flag |= CTC_CHIP_LED_MODE_SET_OP;
    }

    index = CTC_CLI_GET_ARGC_INDEX("sec-mode");
    if (index != 0xFF)
    {
        if (index + 1 >= argc)
        {
            ctc_cli_out("%% Insufficient  param \n\r");
            return CLI_ERROR;
        }

        CTC_CLI_GET_UINT32_RANGE("sec-mode", led_para.sec_mode, argv[index + 1], 0, CTC_MAX_UINT32_VALUE);
        led_para.op_flag |= CTC_CHIP_LED_MODE_SET_OP;
    }

    index = CTC_CLI_GET_ARGC_INDEX("control-id");
    if (index != 0xFF)
    {
        if (index + 1 >= argc)
        {
            ctc_cli_out("%% Insufficient  param \n\r");
            return CLI_ERROR;
        }

        CTC_CLI_GET_UINT8_RANGE("control-id", led_para.ctl_id, argv[index + 1], 0, CTC_MAX_UINT32_VALUE);
    }

    index = CTC_CLI_GET_ARGC_INDEX("lport-en");
    if (index != 0xFF)
    {
       led_para.lport_en = 1;
    }


    led_para.lchip = g_api_ldev;
    if(g_ctcs_api_en)
    {
         ret = ctcs_chip_set_mac_led_mode(g_api_ldev, &led_para, led_type);
    }
    else
    {
        ret = ctc_chip_set_mac_led_mode(&led_para, led_type);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;

}

CTC_CLI(ctc_cli_chip_reset_hw,
        ctc_cli_chip_reset_hw_cmd,
        "chip reset-hw ",
        "Chip module",
        "Reset hardware")
{
    int32  ret   = CLI_SUCCESS;
    
    uint8  enable;
    enable = 1;

    if(g_ctcs_api_en)
    {
        ret = ctcs_chip_set_property(g_api_ldev, CTC_CHIP_PROP_RESET_HW, &enable);
    }
    else
    {
        ret = ctc_chip_set_property(g_api_ldev, CTC_CHIP_PROP_RESET_HW, &enable);
    }

    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }
    return ret;
}
CTC_CLI(ctc_cli_chip_show_reset_hw,
        ctc_cli_chip_show_reset_hw_cmd,
        "show chip reset-hw status ",
        "Show",
        "Chip module",
        "Reset hardware",
        "Status")
{
    uint32  hw_reset_status;
    int32  ret   = CLI_SUCCESS;

    if(g_ctcs_api_en)
    {
        ret = ctcs_chip_get_property(g_api_ldev, CTC_CHIP_PROP_RESET_HW, &hw_reset_status);
    }
    else
    {
        ret = ctc_chip_get_property(g_api_ldev, CTC_CHIP_PROP_RESET_HW, &hw_reset_status);
    }

    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }
    ctc_cli_out("Reset hw status: %s\n", (hw_reset_status==CTC_CHIP_HW_RESET_DONE) ? "done" : \
            (hw_reset_status==CTC_CHIP_HW_RESET_PROCESSING) ? "processing" : "done with error");
    return ret;
}

CTC_CLI(ctc_cli_chip_im_loss_interval,
        ctc_cli_chip_im_loss_interval_cmd,
        "chip global-cfg im-loss-profile VALUE interval INTERVAL ",
        "Chip module",
        "Global cfg ",
        "Im loss profile",
        "Loss profile Value",
        "Loss profile interval",
        "Loss profile interval value")
{
    int32  ret   = CLI_SUCCESS;
    ctc_npm_im_loss_prof_t loss_prof;

    sal_memset(&loss_prof, 0 , sizeof(ctc_npm_im_loss_prof_t));



    CTC_CLI_GET_UINT32("im-loss-profile", loss_prof.loss_prof_id, argv[0]);
    CTC_CLI_GET_UINT32("interval",  loss_prof.interval, argv[1]);

    if(g_ctcs_api_en)
    {
        ret = ctcs_global_ctl_set(g_api_ldev, CTC_GLOBAL_NPM_IM_LOSS_PROF_INTERVAL, &loss_prof);
    }
    else
    {
        ret = ctc_global_ctl_set(CTC_GLOBAL_NPM_IM_LOSS_PROF_INTERVAL, &loss_prof);
    }

    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }
    return ret;
}

CTC_CLI(ctc_cli_chip_get_im_loss_interval,
    ctc_cli_chip_get_im_loss_interval_cmd,
    "show chip global-cfg im-loss-profile VALUE ",
    "Show",
    "Chip module",
    "Global config",
    "Im loss profile",
    "Loss profile Value"
    )
{
    int32 ret = 0;
    
    ctc_npm_im_loss_prof_t loss_prof;

    sal_memset(&loss_prof, 0 , sizeof(ctc_npm_im_loss_prof_t));



    CTC_CLI_GET_UINT32("im-loss-profile", loss_prof.loss_prof_id, argv[0]);

    if(g_ctcs_api_en)
    {
        ret = ctcs_global_ctl_get(g_api_ldev, CTC_GLOBAL_NPM_IM_LOSS_PROF_INTERVAL, &loss_prof);
    }
    else
    {
        ret = ctc_global_ctl_get(CTC_GLOBAL_NPM_IM_LOSS_PROF_INTERVAL, &loss_prof);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }
    else
    {
        ctc_cli_out("Loss profile: %d interval %d\n", loss_prof.loss_prof_id, loss_prof.interval);
    }

    return ret;
}

CTC_CLI(ctc_cli_chip_mem_check,
        ctc_cli_chip_mem_check_cmd,
        "chip mem-check {(mem-id MEMID)|all} (recover-en ENABLE|) ",
        "Chip module",
        "Memory check ",
        "Memory id",
        "Memory id value",
        "All memory id",
        "Recover the memory when compared result is wrong",
        "Value")
{
    int32  ret   = CLI_SUCCESS;
    
    uint8  index;
    uint32 loop = 0;
    uint32 start_ram = 0;
    uint32 end_ram = 0;
    ctc_global_mem_chk_t mem_check ;

    sal_memset(&mem_check, 0 , sizeof(ctc_global_mem_chk_t));



    index = CTC_CLI_GET_ARGC_INDEX("all");
    if (index != 0xFF)
    {
        start_ram = 0;
        end_ram = 103;/*refer to  DRV_FTM_MAX_ID*/
    }
    index = CTC_CLI_GET_ARGC_INDEX("mem-id");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT32("mem-id", start_ram, argv[index + 1]);
        end_ram = start_ram + 1;
    }

    index = CTC_CLI_GET_ARGC_INDEX("recover-en");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT32("recover-en",  mem_check.recover_en, argv[index + 1]);
    }


    for (loop = start_ram; loop < end_ram; loop++ )
    {
        mem_check.mem_id = loop;
        if(g_ctcs_api_en)
        {
            ret = ctcs_global_ctl_set(g_api_ldev, CTC_GLOBAL_MEM_CHK, &mem_check);
        }
        else
        {
            ret = ctc_global_ctl_set(CTC_GLOBAL_MEM_CHK, &mem_check);
        }
    }


    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }
    return ret;
}


CTC_CLI(ctc_cli_chip_mem_scan_mode,
        ctc_cli_chip_mem_scan_mode_cmd,
        "chip mem-scan {tcam | sbe} (continuous SCAN_INTERVAL | once | stop) ",
        "chip module",
        "Memory scan",
        "Tcam key",
        "Single bit error",
        "Scan Continuously",
        "Interval time between every scan, unit is minute, 0 means disable scan",
        "Scan once",
        "Stop scan")
{
    int32  ret   = CLI_SUCCESS;
    uint8  index = 0, scan_tcam = 0, scan_sbe = 0;
    ctc_chip_mem_scan_cfg_t cfg;

    sal_memset(&cfg, 0, sizeof(ctc_chip_mem_scan_cfg_t));
    if(g_ctcs_api_en)
    {
         ret = ctcs_chip_get_property(g_api_ldev, CTC_CHIP_PROP_MEM_SCAN, &cfg);
    }
    else
    {
        ret = ctc_chip_get_property(g_api_ldev, CTC_CHIP_PROP_MEM_SCAN, &cfg);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }



    index = CTC_CLI_GET_ARGC_INDEX("tcam");
    if (index != 0xFF)
    {
        scan_tcam = 1;
    }

    index = CTC_CLI_GET_ARGC_INDEX("sbe");
    if (index != 0xFF)
    {
        scan_sbe = 1;
    }

    index = CTC_CLI_GET_ARGC_INDEX("continuous");
    if (index != 0xFF)
    {
        if (scan_tcam)
        {
            cfg.tcam_scan_mode = 1;
            CTC_CLI_GET_UINT32("interval", cfg.tcam_scan_interval, argv[index + 1]);
        }
        if (scan_sbe)
        {
            cfg.sbe_scan_mode = 1;
            CTC_CLI_GET_UINT32("interval", cfg.sbe_scan_interval, argv[index + 1]);
        }
    }

    index = CTC_CLI_GET_ARGC_INDEX("once");
    if (index != 0xFF)
    {
        if (scan_tcam)
        {
            cfg.tcam_scan_mode = 0;
        }
        if (scan_sbe)
        {
            cfg.sbe_scan_mode = 0;
        }
    }

    index = CTC_CLI_GET_ARGC_INDEX("stop");
    if (index != 0xFF)
    {
        if (scan_tcam)
        {
            cfg.tcam_scan_mode = 2;
        }
        if (scan_sbe)
        {
            cfg.sbe_scan_mode = 2;
        }
    }

    if(g_ctcs_api_en)
    {
         ret = ctcs_chip_set_property(g_api_ldev, CTC_CHIP_PROP_MEM_SCAN, &cfg);
    }
    else
    {
        ret = ctc_chip_set_property(g_api_ldev, CTC_CHIP_PROP_MEM_SCAN, &cfg);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return CLI_SUCCESS;
}


CTC_CLI(ctc_cli_chip_mac_led_en,
        ctc_cli_chip_mac_led_en_cmd,
        "chip mac-led (enable | disable) ",
        "Chip module",
        "Mac led",
        "Enable",
        "Disable")
{
    int32 ret       = CLI_SUCCESS;
    bool enable;

    if (CLI_CLI_STR_EQUAL("enable", 0))
    {
        enable = TRUE;
    }
    else
    {
        enable = FALSE;
    }



    if(g_ctcs_api_en)
    {
         ret = ctcs_chip_set_property(g_api_ldev, CTC_CHIP_MAC_LED_EN, (void*)&enable);
    }
    else
    {
        ret = ctc_chip_set_property(g_api_ldev, CTC_CHIP_MAC_LED_EN, (void*)&enable);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;

}

CTC_CLI(ctc_cli_chip_cpu_led_en,
        ctc_cli_chip_cpu_led_en_cmd,
        "chip cpu-led (enable | disable) ",
        "Chip module",
        "Cpu led",
        "Enable",
        "Disable")
{
    int32 ret       = CLI_SUCCESS;
    bool enable;

    if (CLI_CLI_STR_EQUAL("enable", 0))
    {
        enable = TRUE;
    }
    else
    {
        enable = FALSE;
    }



    if(g_ctcs_api_en)
    {
         ret = ctcs_chip_set_property(g_api_ldev, CTC_CHIP_PROP_CPU_LED_EN, (void*)&enable);
    }
    else
    {
        ret = ctc_chip_set_property(g_api_ldev, CTC_CHIP_PROP_CPU_LED_EN, (void*)&enable);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;
}

CTC_CLI(ctc_cli_chip_show_cpu_led_en,
        ctc_cli_chip_show_cpu_led_en_cmd,
        "show chip cpu-led ",
        "Get cpu led state",
        "Chip module",
        "Cpu led")
{
    int32 ret       = CLI_SUCCESS;
    bool enable;

    if(g_ctcs_api_en)
    {
         ret = ctcs_chip_get_property(g_api_ldev, CTC_CHIP_PROP_CPU_LED_EN, (void*)&enable);
    }
    else
    {
        ret = ctc_chip_get_property(g_api_ldev, CTC_CHIP_PROP_CPU_LED_EN, (void*)&enable);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }
    ctc_cli_out("cpu-led: %s\n", enable? "enable": "disable");

    return ret;
}

CTC_CLI(ctc_cli_chip_mac_led_clock_frequency,
        ctc_cli_chip_mac_led_clock_frequency_cmd,
        "chip mac-led (freq FREQ | interval INTERVAL) ",
        "Chip module",
        "Mac led",
        "Mac led clock frequency",
        "Frequency value(K)",
        "Mac led blink interval",
        "Interval value")
{
    int32 ret       = CLI_SUCCESS;
    uint16 freq = 0;
    
    uint8 index = 0;
    uint32 interval = 0;
    void* value = 0;
    ctc_chip_peri_clock_t peri_clock;
    uint8 type = 0;
    sal_memset(&peri_clock, 0, sizeof(ctc_chip_peri_clock_t));

    index = CTC_CLI_GET_ARGC_INDEX("freq");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT16("freq-id", freq, argv[index + 1]);
        peri_clock.type = CTC_CHIP_PERI_MAC_LED_TYPE;
        peri_clock.clock_val = freq;
        type = CTC_CHIP_PROP_PERI_CLOCK;
        value = &peri_clock;
    }

    index = CTC_CLI_GET_ARGC_INDEX("interval");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT32("interval", interval, argv[index + 1]);
        type = CTC_CHIP_PROP_MAC_LED_BLINK_INTERVAL;
        value = &interval;
    }



    if(g_ctcs_api_en)
    {
         ret = ctcs_chip_set_property(g_api_ldev, type, value);
    }
    else
    {
        ret = ctc_chip_set_property(g_api_ldev, type, value);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;
}

CTC_CLI(ctc_cli_chip_io_wr_dis,
        ctc_cli_chip_reg_io_dis_cmd,
        "chip io write (enable | disable) ",
        "Chip module",
        "IO",
        "Write",
        "Enable",
        "Disable")
{
    int32 ret       = CLI_SUCCESS;
    uint32 enable = 0;

    if (CLI_CLI_STR_EQUAL("enable", 0))
    {
        enable = FALSE;
    }
    else
    {
        enable = TRUE;
    }



    if(g_ctcs_api_en)
    {
         ret = ctcs_chip_set_property(g_api_ldev, CTC_CHIP_PROP_IO_WR_DIS, (void*)&enable);
    }
    else
    {
        ret = ctc_chip_set_property(g_api_ldev, CTC_CHIP_PROP_IO_WR_DIS, (void*)&enable);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;
}

CTC_CLI(ctc_cli_chip_show_mac_led_clock_frequency,
        ctc_cli_chip_show_mac_led_clock_frequency_cmd,
        "show chip mac-led (freq | interval) ",
        "Show",
        "Chip module",
        "Mac led",
        "I2c clock frequency",
        "Mac led blink interval")
{
    int32 ret       = CLI_SUCCESS;
    
    uint8 index = 0;
    void* value = 0;
    uint8 type = 0;
    uint32 interval = 0;
    ctc_chip_peri_clock_t peri_clock;

    sal_memset(&peri_clock, 0, sizeof(ctc_chip_peri_clock_t));


    index = CTC_CLI_GET_ARGC_INDEX("freq");
    if (0xFF != index)
    {
        peri_clock.type = CTC_CHIP_PERI_MAC_LED_TYPE;
        type = CTC_CHIP_PROP_PERI_CLOCK;
        value = &peri_clock;
    }

    index = CTC_CLI_GET_ARGC_INDEX("interval");
    if (0xFF != index)
    {
        type = CTC_CHIP_PROP_MAC_LED_BLINK_INTERVAL;
        value = &interval;
    }

    if(g_ctcs_api_en)
    {
         ret = ctcs_chip_get_property(g_api_ldev, type, value);
    }
    else
    {
        ret = ctc_chip_get_property(g_api_ldev, type, value);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }
    if(type == CTC_CHIP_PROP_PERI_CLOCK)
    {
        ctc_cli_out("Mac led clock frequency is %u Khz \n", peri_clock.clock_val);
    }
    else
    {
        ctc_cli_out("Mac led blink interval is %u \n", interval);
    }

    return ret;
}

CTC_CLI(ctc_cli_chip_gpio_operation,
        ctc_cli_chip_gpio_operation_cmd,
        "chip gpio gpio-id GPIO_ID (mode MODE | output VALUE | input) ",
        "Chip module",
        "Gpio",
        "Gpio id",
        "<0-15>",
        "Gpio mode",
        "0:input 1:output 2:special function[GB only] 3:edge intr input 4:level intr input",
        "Output value",
        "0-1",
        "Input value")
{
    int32 ret = CLI_SUCCESS;
    uint8 index = 0;
    
    ctc_chip_gpio_params_t gpio_param = {0};

    CTC_CLI_GET_UINT8_RANGE("gpio-id", gpio_param.gpio_id, argv[0], 0, CTC_MAX_UINT8_VALUE);



    index = CTC_CLI_GET_ARGC_INDEX("mode");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT8("mode", gpio_param.value , argv[index + 1]);
        if(g_ctcs_api_en)
        {
             ret = ctcs_chip_set_property(g_api_ldev, CTC_CHIP_PROP_GPIO_MODE, (void*)&gpio_param);
        }
        else
        {
            ret = ctc_chip_set_property(g_api_ldev, CTC_CHIP_PROP_GPIO_MODE, (void*)&gpio_param);
        }
        if (ret < 0)
        {
            ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
            return CLI_ERROR;
        }
    }

    index = CTC_CLI_GET_ARGC_INDEX("output");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT8("output", gpio_param.value , argv[index + 1]);
        if(g_ctcs_api_en)
        {
             ret = ctcs_chip_set_property(g_api_ldev, CTC_CHIP_PROP_GPIO_OUT, (void*)&gpio_param);
        }
        else
        {
            ret = ctc_chip_set_property(g_api_ldev, CTC_CHIP_PROP_GPIO_OUT, (void*)&gpio_param);
        }
        if (ret < 0)
        {
            ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
            return CLI_ERROR;
        }
    }

    index = CTC_CLI_GET_ARGC_INDEX("input");
    if (0xFF != index)
    {
        if(g_ctcs_api_en)
        {
             ret = ctcs_chip_get_property(g_api_ldev, CTC_CHIP_PROP_GPIO_IN, (void*)&gpio_param);
        }
        else
        {
            ret = ctc_chip_get_property(g_api_ldev, CTC_CHIP_PROP_GPIO_IN, (void*)&gpio_param);
        }
        if (ret < 0)
        {
            ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
            return CLI_ERROR;
        }

        ctc_cli_out("GPIO %d Input Signal %u \n", gpio_param.gpio_id, gpio_param.value);
    }

    return ret;

}

CTC_CLI(ctc_cli_chip_set_gpio_operation,
        ctc_cli_chip_set_gpio_operation_cmd,
        "chip gpio gpio-id GPIO_ID {debounce-en VALUE |level-edge-val VALUE} ",
        "Chip module",
        "Gpio",
        "Gpio id",
        "<0-15>",
        "Debounce enable",
        "0-1",
        "Level edge val",
        "0-1")
{
    int32 ret = CLI_SUCCESS;
    uint8 index = 0;
    
    ctc_chip_gpio_params_t gpio_param = {0};
    ctc_chip_gpio_cfg_t gpio_cfg = {0};
    CTC_CLI_GET_UINT8_RANGE("gpio-id", gpio_param.gpio_id, argv[0], 0, CTC_MAX_UINT8_VALUE);
    CTC_CLI_GET_UINT8_RANGE("gpio-id", gpio_cfg.gpio_id, argv[0], 0, CTC_MAX_UINT8_VALUE);

    index = CTC_CLI_GET_ARGC_INDEX("debounce-en");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT8("debounce-en", gpio_cfg.debounce_en , argv[index + 1]);
        if(g_ctcs_api_en)
        {
             ret = ctcs_chip_set_property(g_api_lchip, CTC_CHIP_PROP_GPIO_CFG, (void*)&gpio_cfg);
        }
        else
        {
            ret = ctc_chip_set_property(g_api_lchip, CTC_CHIP_PROP_GPIO_CFG, (void*)&gpio_cfg);
        }
        if (ret < 0)
        {
            ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
            return CLI_ERROR;
        }
    }

    index = CTC_CLI_GET_ARGC_INDEX("level-edge-val");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT8("level-edge-val", gpio_cfg.level_edge_val , argv[index + 1]);
        if(g_ctcs_api_en)
        {
             ret = ctcs_chip_set_property(g_api_lchip, CTC_CHIP_PROP_GPIO_CFG, (void*)&gpio_cfg);
        }
        else
        {
            ret = ctc_chip_set_property(g_api_lchip, CTC_CHIP_PROP_GPIO_CFG, (void*)&gpio_cfg);
        }
        if (ret < 0)
        {
            ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
            return CLI_ERROR;
        }
    }

    return ret;
}


CTC_CLI(ctc_cli_chip_get_gpio_operation,
        ctc_cli_chip_get_gpio_operation_cmd,
        "show chip gpio gpio-id GPIO_ID",
        "Show",
        "Chip module"
        "Gpio",
        "Gpio id",
        "<0-15>")
{
    int32 ret = CLI_SUCCESS;
    ctc_chip_gpio_cfg_t gpio_cfg = {0};
    CTC_CLI_GET_UINT8_RANGE("gpio-id", gpio_cfg.gpio_id, argv[0], 0, CTC_MAX_UINT8_VALUE);

    if(g_ctcs_api_en)
    {
        ret = ctcs_chip_get_property(g_api_lchip, CTC_CHIP_PROP_GPIO_CFG, (void*)&gpio_cfg);
    }
    else
    {
        ret = ctc_chip_get_property(g_api_lchip, CTC_CHIP_PROP_GPIO_CFG, (void*)&gpio_cfg);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("debounce: %d\n",gpio_cfg.debounce_en);
    ctc_cli_out("level-edge-val: %d\n",gpio_cfg.level_edge_val);

    return ret;
}

CTC_CLI(ctc_cli_chip_phy_sample,
        ctc_cli_chip_phy_sample_cmd,
        "chip phy sample (offset|edge) (bus ID value VALUE) ",
        "Chip module",
        "Phy",
        "Sample",
        "Offset",
        "Edge",
        "Bus",
        "Bus id",
        "Value",
        "Input value")
{
    int32 ret = CLI_SUCCESS;
    uint8 index = 0;
    
    ctc_chip_mdio_para_t mdio_param;
    uint32 type = 0;

    sal_memset(&mdio_param, 0, sizeof(ctc_chip_mdio_para_t));



    index = CTC_CLI_GET_ARGC_INDEX("offset");
    if (0xFF != index)
    {
        type = CTC_CHIP_PROP_PHY_SAMPLE_OFFSET;
    }

    index = CTC_CLI_GET_ARGC_INDEX("edge");
    if (0xFF != index)
    {
        type = CTC_CHIP_PROP_PHY_SAMPLE_EDGE;
    }
    
    index = CTC_CLI_GET_ARGC_INDEX("bus");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT8("mdio bus id", mdio_param.bus , argv[index + 1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("value");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT16("sample value", mdio_param.value , argv[index + 1]);
    }

    if(g_ctcs_api_en)
    {
         ret = ctcs_chip_set_property(g_api_ldev, type, (void*)&mdio_param);
    }
    else
    {
        ret = ctc_chip_set_property(g_api_ldev, type, (void*)&mdio_param);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;
}

CTC_CLI(ctc_cli_chip_set_mdc_voltage_mode,
        ctc_cli_chip_set_mdc_voltage_mode_cmd,
        "chip mdc voltage mode MODE ",
        "Chip module",
        "Mdc and mdio",
        "Voltage",
        "Mode",
        "Mode value, 0: 3.3V, 1: 1.8V/1.2V")
{
    int32 ret       = CLI_SUCCESS;
    uint32 mode = 0;

    CTC_CLI_GET_UINT32("mode", mode, argv[0]);


    if(g_ctcs_api_en)
    {
         ret = ctcs_chip_set_property(g_api_ldev, CTC_CHIP_PROP_MDC_VOLTAGE_MODE, (void*)&mode);
    }
    else
    {
        ret = ctc_chip_set_property(g_api_ldev, CTC_CHIP_PROP_MDC_VOLTAGE_MODE, (void*)&mode);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;
}

CTC_CLI(ctc_cli_chip_get_mdc_voltage_mode,
        ctc_cli_chip_get_mdc_voltage_mode_cmd,
        "show chip mdc voltage mode ",
        "Show",
        "Chip module",
        "Mdc and mdio",
        "Voltage",
        "Mode")
{
    int32 ret       = CLI_SUCCESS;
    uint32 mode = 0;

    if(g_ctcs_api_en)
    {
         ret = ctcs_chip_get_property(g_api_ldev, CTC_CHIP_PROP_MDC_VOLTAGE_MODE, (void*)&mode);
    }
    else
    {
        ret = ctc_chip_get_property(g_api_ldev, CTC_CHIP_PROP_MDC_VOLTAGE_MODE, (void*)&mode);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("mdc voltage value is %s \n", (mode? "1.2V/1.8V": "3.3V"));
    return ret;
}

CTC_CLI(ctc_cli_chip_set_global_prop,
        ctc_cli_chip_set_global_prop_cmd,
        "chip set property (cpu-rx VALUE) ",
        "Chip module",
        "Set",
        "Global property",
        "Cpu rx",
        "Value")
{
    int32 ret       = CLI_SUCCESS;
    uint32 value = 0;
    uint32 chip_prop = 0; 
    uint8 index = 0;
    

    index = CTC_CLI_GET_ARGC_INDEX("cpu-rx");
    if (index != 0xFF)
    {
        CTC_CLI_GET_UINT32_RANGE("cpu-rx", value, argv[index + 1], 0, CTC_MAX_UINT32_VALUE);
        chip_prop = CTC_GLOBAL_WARMBOOT_CPU_RX_EN;
    }

    if(g_ctcs_api_en)
    {
        ret = ctcs_global_ctl_set(g_api_ldev, chip_prop, &value);
    }
    else
    {
        ret = ctc_global_ctl_set(chip_prop, &value);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }    
    
    return ret;
}

CTC_CLI(ctc_cli_chip_access_mode,
        ctc_cli_chip_access_mode_cmd,
        "chip access mode (PCI|I2C)",
        "Chip module",
        "Access",
        "Mode",
        "PCI access",
        "I2C access")
{
    int32 ret       = CLI_SUCCESS;
    ctc_chip_access_type_t access_type;

    if (0 == sal_memcmp("PCI", argv[0], 3))
    {
        access_type = CTC_CHIP_PCI_ACCESS;
    }
    else
    {
        access_type = CTC_CHIP_I2C_ACCESS;
    }

    if(g_ctcs_api_en)
    {
         ret = ctcs_chip_set_access_type(g_api_ldev, access_type);
    }
    else
    {
        ret = ctc_chip_set_access_type(access_type);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;

}


CTC_CLI(ctc_cli_chip_serdes_mode,
        ctc_cli_chip_serdes_mode_cmd,
        "chip serdes SERDES mode (100base-fx|xfi|sgmii|xsgmii|qsgmii|xaui|d-xaui|xlg|cg-r4|2dot5g|usxgmii0|usxgmii1|usxgmii2|xxvg|lg-r2|lg-r1|cg-r2|ccg-r4|cdg-r8|xlg-r2|cg-r1|ccg-r2|cdg-r4|dcccg-r8|xlg-r1|none)(overclocking-speed VALUE|)(lport LPORT|)",
        "Chip module",
        "Serdes",
        "Serdes id",
        "Serdes mode",
        "100base-fx mode",
        "Xfi mode",
        "Sgmii mode",
        "Xsgmii mode",
        "Qsgmii mode",
        "Xaui mode",
        "D-xaui mode",
        "Xlg mode",
        "Cg-r4 mode",
        "2.5g mode",
        "Usxgmii single mode",
        "Usxgmii multi 1g/2.5g mode",
        "Usxgmii multi 5g mode",
        "Xxvg mode",
        "Lg-r2 mode",
        "Lg-r1 mode",
        "Cg-r2 mode",
        "Ccg-r4 mode",
        "Cdg-r8 mode",
        "Xlg-r2 mode",
        "Cg-r1 mode",
        "Ccg-r2 mode",
        "Cdg-r4 mode",
        "Dcccg-r8 mode",
        "Xlg-r1 mode",
        "None",
        "Overclocking speed",
        "\n1     Port Speed:11.06G   Date Rate:11.40625G\n2     Port Speed:12.12G   Date Rate:12.5G\n3     Port Speed:12.58G   Date Rate:12.96875G  \
         \n4     Port Speed:27.27G   Date Rate:28.125G\n5     Port Speed:10.6G    Date Rate:10.9375G\n7     Port Speed:26.52G   Date Rate:27.34375G     \
         \n8     Port Speed:26.9G    Date Rate:27.78125G\n11    Port Speed:11.06G   Date Rate:11.40625G\n12    Port Speed:12.58G   Date Rate:12.96875G   \
         \n14    Port Speed:52.94G   Date Rate:56.25G\n17    Port Speed:105.88G   Date Rate:112.5G\n",
        "Lport valid",
        "Lport value")
{
    int32 ret       = CLI_SUCCESS;
    ctc_chip_serdes_info_t serdes_info;
    
    uint8 index = 0;

    sal_memset(&serdes_info, 0, sizeof(ctc_chip_serdes_info_t));
    CTC_CLI_GET_UINT16_RANGE("serdes", serdes_info.serdes_id, argv[0], 0, CTC_MAX_UINT16_VALUE);

    if (0 == sal_strncmp("100base-fx", argv[1], 10))
    {
        serdes_info.serdes_mode = CTC_CHIP_SERDES_100BASEFX_MODE;
    }
    else if (0 == sal_strncmp("xfi", argv[1], 3))
    {
        serdes_info.serdes_mode = CTC_CHIP_SERDES_XFI_MODE;
    }
    else if (0 == sal_strncmp("sgmii", argv[1], 5))
    {
        serdes_info.serdes_mode = CTC_CHIP_SERDES_SGMII_MODE;
    }
    else if (0 == sal_strncmp("xsgmii", argv[1], 6))
    {
        serdes_info.serdes_mode = CTC_CHIP_SERDES_XSGMII_MODE;
    }
    else if (0 == sal_strncmp("qsgmii", argv[1], 6))
    {
        serdes_info.serdes_mode = CTC_CHIP_SERDES_QSGMII_MODE;
    }
    else if (0 == sal_strncmp("xaui", argv[1], 4))
    {
        serdes_info.serdes_mode = CTC_CHIP_SERDES_XAUI_MODE;
    }
    else if (0 == sal_strncmp("d-xaui", argv[1], 6))
    {
        serdes_info.serdes_mode = CTC_CHIP_SERDES_DXAUI_MODE;
    }
    else if (0 == sal_strncmp("xlg-r2", argv[1], 6))
    {
        serdes_info.serdes_mode = CTC_CHIP_SERDES_XLG_R2_MODE;
    }
    else if (0 == sal_strncmp("xlg-r1", argv[1], 6))
    {
        serdes_info.serdes_mode = CTC_CHIP_SERDES_XLG_R1_MODE;
    }
    else if (0 == sal_strncmp("xlg", argv[1], 3))
    {
        serdes_info.serdes_mode = CTC_CHIP_SERDES_XLG_MODE;
    }
    else if (0 == sal_strncmp("cg-r2", argv[1], 5))
    {
        serdes_info.serdes_mode = CTC_CHIP_SERDES_CG_R2_MODE;
    }
    else if (0 == sal_strncmp("cg-r4", argv[1], 5))
    {
        serdes_info.serdes_mode = CTC_CHIP_SERDES_CG_MODE;
    }
    else if (0 == sal_strncmp("2dot5g", argv[1], 6))
    {
        serdes_info.serdes_mode = CTC_CHIP_SERDES_2DOT5G_MODE;
    }
    else if (0 == sal_strncmp("usxgmii0", argv[1], 8))
    {
        serdes_info.serdes_mode = CTC_CHIP_SERDES_USXGMII0_MODE;
    }
    else if (0 == sal_strncmp("usxgmii1", argv[1], 8))
    {
        serdes_info.serdes_mode = CTC_CHIP_SERDES_USXGMII1_MODE;
    }
    else if (0 == sal_strncmp("usxgmii2", argv[1], 8))
    {
        serdes_info.serdes_mode = CTC_CHIP_SERDES_USXGMII2_MODE;
    }
    else if (0 == sal_strncmp("xxvg", argv[1], 4))
    {
        serdes_info.serdes_mode = CTC_CHIP_SERDES_XXVG_MODE;
    }
    else if (0 == sal_strncmp("lg-r1", argv[1], 5))
    {
        serdes_info.serdes_mode = CTC_CHIP_SERDES_LG_R1_MODE;
    }
    else if (0 == sal_strncmp("lg-r2", argv[1], 5))
    {
        serdes_info.serdes_mode = CTC_CHIP_SERDES_LG_MODE;
    }
    else if (0 == sal_strncmp("ccg-r4", argv[1], 6))
    {
        serdes_info.serdes_mode = CTC_CHIP_SERDES_CCG_R4_MODE;
    }
    else if (0 == sal_strncmp("cdg-r8", argv[1], 6))
    {
        serdes_info.serdes_mode = CTC_CHIP_SERDES_CDG_R8_MODE;
    }
    else if (0 == sal_strncmp("cg-r1", argv[1], 5))
    {
        serdes_info.serdes_mode = CTC_CHIP_SERDES_CG_R1_MODE;
    }
    else if (0 == sal_strncmp("ccg-r2", argv[1], 6))
    {
        serdes_info.serdes_mode = CTC_CHIP_SERDES_CCG_R2_MODE;
    }
    else if (0 == sal_strncmp("cdg-r4", argv[1], 6))
    {
        serdes_info.serdes_mode = CTC_CHIP_SERDES_CDG_R4_MODE;
    }
    else if (0 == sal_strncmp("dcccg-r8", argv[1], 8))
    {
        serdes_info.serdes_mode = CTC_CHIP_SERDES_DCCCG_R8_MODE;
    }
    else if (0 == sal_strncmp("none", argv[1], 4))
    {
        serdes_info.serdes_mode = CTC_CHIP_SERDES_NONE_MODE;
    }

    index = CTC_CLI_GET_ARGC_INDEX("overclocking-speed");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT16("overclocking speed", serdes_info.overclocking_speed, argv[index + 1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("lport");
    if (0xFF != index)
    {
        serdes_info.lport_valid= 1;
        CTC_CLI_GET_UINT32("lport", serdes_info.lport, argv[index + 1]);
    }

    if(g_ctcs_api_en)
    {
        ret = ctcs_chip_set_serdes_mode(g_api_ldev, &serdes_info);
    }
    else
    {
        ret = ctc_chip_set_serdes_mode(g_api_ldev, &serdes_info);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;

}

CTC_CLI(ctc_cli_chip_martian_addr,
    ctc_cli_chip_martian_addr_cmd,
    "chip global-cfg martian-address (ipv4 A.B.C.D |ipv6 X:X::X:X) MASKLEN (index INDEX|)",
    "Chip module",
    "Global config",
    "Martian address",
    "IPv4",
    CTC_CLI_IPV4_FORMAT,
    "IPv6",
    CTC_CLI_IPV6_FORMAT,
    "Masklen",
    "Index",
    "INDEX VALUE"
    )
{
    uint8 index = 0;
    int32 ret = 0;
    ctc_global_martian_addr_t martian_addr;
    sal_memset(&martian_addr, 0, sizeof(ctc_global_martian_addr_t));

    index = CTC_CLI_GET_ARGC_INDEX("ipv4");
    if (INDEX_VALID(index))
    {
        CTC_CLI_GET_IPV4_ADDRESS("ip", martian_addr.addr.ipv4, argv[index+1]);
        martian_addr.ip_ver = CTC_IP_VER_4;
        CTC_CLI_GET_UINT8_RANGE("masklen", martian_addr.masklen, argv[index+2], 0, CTC_MAX_UINT8_VALUE);
    }
    index = CTC_CLI_GET_ARGC_INDEX("ipv6");
    if (INDEX_VALID(index))
    {
        CTC_CLI_GET_IPV6_ADDRESS("ipv6", martian_addr.addr.ipv6, argv[index+1]);
        martian_addr.ip_ver = CTC_IP_VER_6;
        CTC_CLI_GET_UINT8_RANGE("masklen", martian_addr.masklen, argv[index+2], 0, CTC_MAX_UINT8_VALUE);
    }

    index = CTC_CLI_GET_ARGC_INDEX("index");
    if (INDEX_VALID(index))
    {
        CTC_CLI_GET_UINT8_RANGE("index", martian_addr.index, argv[index+1], 0, CTC_MAX_UINT8_VALUE);
    }

    if(g_ctcs_api_en)
    {
        ret = ctcs_global_ctl_set(g_api_ldev, CTC_GLOBAL_DISCARD_IP_MARTIAN_ADDR_PKT, &martian_addr);
    }
    else
    {
        ret = ctc_global_ctl_set(CTC_GLOBAL_DISCARD_IP_MARTIAN_ADDR_PKT, &martian_addr);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;
}

CTC_CLI(ctc_cli_chip_get_martian_addr,
    ctc_cli_chip_get_martian_addr_cmd,
    "show chip global-cfg martian-address (ipv4|ipv6) (index INDEX|) ",
    "Show",
    "Chip module",
    "Global config",
    "Martian address",
    "IPv4",
    "IPv6",
    "Index",
    "INDEX VALUE"
    )
{
    uint8 index = 0;
    int32 ret = 0;
    ctc_global_martian_addr_t martian_addr;
    sal_memset(&martian_addr, 0, sizeof(ctc_global_martian_addr_t));

    index = CTC_CLI_GET_ARGC_INDEX("ipv4");
    if (INDEX_VALID(index))
    {
        martian_addr.ip_ver = CTC_IP_VER_4;
    }
    index = CTC_CLI_GET_ARGC_INDEX("ipv6");
    if (INDEX_VALID(index))
    {
        martian_addr.ip_ver = CTC_IP_VER_6;
    }
    index = CTC_CLI_GET_ARGC_INDEX("index");
    if (INDEX_VALID(index))
    {
        CTC_CLI_GET_UINT8_RANGE("index", martian_addr.index, argv[index+1], 0, CTC_MAX_UINT8_VALUE);
    }


    if(g_ctcs_api_en)
    {
        ret = ctcs_global_ctl_get(g_api_ldev, CTC_GLOBAL_DISCARD_IP_MARTIAN_ADDR_PKT, &martian_addr);
    }
    else
    {
        ret = ctc_global_ctl_get(CTC_GLOBAL_DISCARD_IP_MARTIAN_ADDR_PKT, &martian_addr);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }
    else
    {
        if (martian_addr.ip_ver == CTC_IP_VER_4)
        {
            ctc_cli_out("matrian addr: 0x%x\n", martian_addr.addr.ipv4);
            ctc_cli_out("matrian mask: %d\n", martian_addr.masklen);
        }
        else
        {
            ctc_cli_out("matrian addr: %x:%x:%x:%x:%x:%x:%x:%x\n", martian_addr.addr.ipv6[0] >> 16,
                           martian_addr.addr.ipv6[0]&0xffff,
                           martian_addr.addr.ipv6[1] >> 16,
                           martian_addr.addr.ipv6[1]&0xffff,
                           martian_addr.addr.ipv6[2] >> 16,
                           martian_addr.addr.ipv6[2]&0xffff,
                           martian_addr.addr.ipv6[3] >> 16,
                           martian_addr.addr.ipv6[3]&0xffff);
            ctc_cli_out("matrian mask: %d\n", martian_addr.masklen);
        }
    }

    return ret;
}

CTC_CLI(ctc_cli_chip_discard_same_mac_or_ip,
        ctc_cli_chip_discard_same_mac_or_ip_cmd,
        "chip global-cfg (discard-same-mac|discard-same-ip|discard-ttl-0|discard-mcast-macsa|discard-tcp-syn-0|discard-tcp-null| \
        discard-tcp-xmas|discard-tcp-syn-fin| discard-same-l4-port| discard-icmp-fragment |acl-change-cos-only|eloop-use-logic-destport | \
        arp-macda-check-en | arp-macsa-check-en | arp-ip-check-en | arp-check-fail-to-cpu|arp-gratuitous-to-cpu|arp-local-check-en |\
        nh-force-bridge-dis|nh-mcast-logic-rep-en|oam-policer-en| \
        parser-outer-always-cvlan|arp-vlan-class-en|discard-macsa-0|vpws-snooping-parser|disable-egs-stk-acl|stk-with-igs-pkt-hdr|router-mac-match|net-rx|discard-tcp-frag-1) (enable|disable)",
        "Chip module",
        "Global config",
        "Discard same mac address",
        "Discard same ip address",
        "Diacard ttl 0",
        "Discard mcast mac sa",
        "Discard TCP packets with SYN equals 0",
        "Discard TCP packets with flags and sequence number equal 0",
        "Discard TCP packets with FIN, URG, PSH bits set and sequence number equals 0",
        "Discard TCP packets with SYN & FIN bits set",
        "Discard same L4 source and destination port packets",
        "Discard fragmented ICMP packets",
        "Acl vlan edit only change cos",
        "Eloop use logic dest port",
        "Drop ARP reply packets which macda not equal to target mac",
        "Drop ARP packets which macsa not equal to sender mac",
        "Drop ARP packets with invalid ip address",
        "ARP packets check fail and copy to cpu",
        "Gratuitous ARP packets will be copied to cpu",
        "ARP packets which to local will be copied to cpu",
        "NH disable force bridge for ip-mcast when l3 match",
        "Mcast logic replication",
        "Oam policer enable",
        "Parser outer vlan is always cvlan",
        "ARP vlan class enable",
        "Discard macSa 0 packet",
        "Snooping parser",
        "Disable egress stacking acl lookup",
        "Stacking with ingress packet header",
        "Router mac match by l2 lkup",
        "Net rx status",
        "Tcp frag offset value 1",
        "Enable",
        "Disable")
{
    int32 ret       = CLI_SUCCESS;
    bool enable = FALSE;
    uint8 type = 0;
    uint8 index = 0;

    index = CTC_CLI_GET_ARGC_INDEX("discard-same-mac");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_DISCARD_SAME_MACDASA_PKT;
    }

    index = CTC_CLI_GET_ARGC_INDEX("discard-same-ip");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_DISCARD_SAME_IPDASA_PKT;
    }

    index = CTC_CLI_GET_ARGC_INDEX("discard-ttl-0");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_DISCARD_TTL_0_PKT;
    }

    index = CTC_CLI_GET_ARGC_INDEX("discard-mcast-macsa");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_DISCARD_MCAST_SA_PKT;
    }

    index = CTC_CLI_GET_ARGC_INDEX("acl-change-cos-only");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_ACL_CHANGE_COS_ONLY;
    }

    index = CTC_CLI_GET_ARGC_INDEX("discard-tcp-syn-0");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_DISCARD_TCP_SYN_0_PKT;
    }

    index = CTC_CLI_GET_ARGC_INDEX("discard-tcp-null");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_DISCARD_TCP_NULL_PKT;
    }

    index = CTC_CLI_GET_ARGC_INDEX("discard-tcp-xmas");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_DISCARD_TCP_XMAS_PKT;
    }

    index = CTC_CLI_GET_ARGC_INDEX("discard-tcp-syn-fin");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_DISCARD_TCP_SYN_FIN_PKT;
    }

    index = CTC_CLI_GET_ARGC_INDEX("discard-same-l4-port");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_DISCARD_SAME_L4_PORT_PKT;
    }

    index = CTC_CLI_GET_ARGC_INDEX("discard-icmp-fragment");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_DISCARD_ICMP_FRAG_PKT;
    }

    index = CTC_CLI_GET_ARGC_INDEX("eloop-use-logic-destport");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_ELOOP_USE_LOGIC_DESTPORT;
    }

    index = CTC_CLI_GET_ARGC_INDEX("arp-macda-check-en");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_ARP_MACDA_CHECK_EN;
    }

    index = CTC_CLI_GET_ARGC_INDEX("arp-macsa-check-en");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_ARP_MACSA_CHECK_EN;
    }

    index = CTC_CLI_GET_ARGC_INDEX("arp-ip-check-en");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_ARP_IP_CHECK_EN;
    }

    index = CTC_CLI_GET_ARGC_INDEX("arp-check-fail-to-cpu");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_ARP_CHECK_FAIL_TO_CPU;
    }
    index = CTC_CLI_GET_ARGC_INDEX("arp-gratuitous-to-cpu");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_GRATUITOUS_ARP_TO_CPU;
    }
    index = CTC_CLI_GET_ARGC_INDEX("arp-local-check-en");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_ARP_LOCAL_CHECK_EN;
    }
    index = CTC_CLI_GET_ARGC_INDEX("nh-force-bridge-dis");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_NH_FORCE_BRIDGE_DISABLE;
    }
    index = CTC_CLI_GET_ARGC_INDEX("nh-mcast-logic-rep-en");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_NH_MCAST_LOGIC_REP_EN;
    }
    index = CTC_CLI_GET_ARGC_INDEX("oam-policer-en");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_OAM_POLICER_EN;
    }

    index = CTC_CLI_GET_ARGC_INDEX("parser-outer-always-cvlan");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_PARSER_OUTER_ALWAYS_CVLAN_EN;
    }
    index = CTC_CLI_GET_ARGC_INDEX("vpws-snooping-parser");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_VPWS_SNOOPING_PARSER;
    }
    index = CTC_CLI_GET_ARGC_INDEX("arp-vlan-class-en");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_ARP_VLAN_CLASS_EN;
    }
    index = CTC_CLI_GET_ARGC_INDEX("discard-macsa-0");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_DISCARD_MACSA_0_PKT;
    }
    index = CTC_CLI_GET_ARGC_INDEX("disable-egs-stk-acl");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_EGS_STK_ACL_DIS;
    }

    index = CTC_CLI_GET_ARGC_INDEX("stk-with-igs-pkt-hdr");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_STK_WITH_IGS_PKT_HDR_EN;
    }

    index = CTC_CLI_GET_ARGC_INDEX("router-mac-match");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_L2_RMAC_MATCH_EN;
    }
    index = CTC_CLI_GET_ARGC_INDEX("net-rx");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_NET_RX_EN;
    }
    index = CTC_CLI_GET_ARGC_INDEX("discard-tcp-frag-1");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_DISCARD_TCP_FRAG_OFFSET_1_PKT;
    }

    index = CTC_CLI_GET_ARGC_INDEX("enable");
    if (INDEX_VALID(index))
    {
        enable = TRUE;
    }

    if(g_ctcs_api_en)
    {
         ret = ctcs_global_ctl_set(g_api_ldev, type, &enable);
    }
    else
    {
        ret = ctc_global_ctl_set(type, &enable);
    }

    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;

}


CTC_CLI(ctc_cli_chip_show_discard_same_mac_or_ip,
        ctc_cli_chip_show_discard_same_mac_or_ip_cmd,
        "show chip global-cfg (discard-same-mac|discard-same-ip|discard-ttl-0|discard-mcast-macsa|discard-tcp-syn-0|discard-tcp-null| \
        discard-tcp-xmas|discard-tcp-syn-fin| discard-same-l4-port| discard-icmp-fragment| acl-change-cos-only|eloop-use-logic-destport | \
        arp-macda-check-en | arp-macsa-check-en | arp-ip-check-en | arp-check-fail-to-cpu|arp-gratuitous-to-cpu|arp-local-check-en|\
        nh-force-bridge-dis|nh-mcast-logic-rep-en| \
        oam-policer-en|parser-outer-always-cvlan|arp-vlan-class-en|discard-macsa-0|vpws-snooping-parser|disable-egs-stk-acl|stk-with-igs-pkt-hdr|router-mac-match|net-rx|sid-edit-mode|discard-tcp-frag-1)",
        "Show",
        "Chip module",
        "Global config",
        "Discard same mac address",
        "Discard same ip address",
        "Diacard ttl 0",
        "Discard mcast mac sa",
        "Discard TCP packets with SYN equals 0",
        "Discard TCP packets with flags and sequence number equal 0",
        "Discard TCP packets with FIN, URG, PSH bits set and sequence number equals 0",
        "Discard TCP packets with SYN & FIN bits set",
        "Discard same L4 source and destination port packets",
        "Discard fragmented ICMP packets",
        "Acl vlan edit only change cos",
        "Eloop use logic dest port",
        "Drop ARP reply packets which macda not equal to target mac",
        "Drop ARP packets which macsa not equal to sender mac",
        "Drop ARP packets with invalid ip address",
        "ARP packets check fail and copy to cpu",
        "Gratuitous ARP packets will be copied to cpu",
        "ARP packets which to local will be copied to cpu",
        "NH disable force bridge for ip-mcast when l3 match",
        "Mcast logic replication",
        "Oam policer enable",
        "Parser outer vlan is always cvlan",
        "ARP vlan class enable",
        "Discard mac sa 0 packet",
        "Snooping parser",
        "Disable egress stacking acl lookup",
        "Stacking with ingress chip packet header",
        "Router mac match by l2 lkup",
        "Net rx status",
        "SID edit mode",
        "Tcp frag offset 1"
        )
{
    int32 ret       = CLI_SUCCESS;
    bool enable = FALSE;
    uint8 type = 0;
    uint8 index = 0;
    void* p_value = NULL;
    uint32 value = 0;

    p_value = &enable;
    index = CTC_CLI_GET_ARGC_INDEX("discard-same-mac");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_DISCARD_SAME_MACDASA_PKT;
        ctc_cli_out("Show chip discard-same-mac info\n");
        ctc_cli_out("==================================\n");
    }

    index = CTC_CLI_GET_ARGC_INDEX("discard-same-ip");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_DISCARD_SAME_IPDASA_PKT;
        ctc_cli_out("Show chip discard-same-ip info\n");
        ctc_cli_out("==================================\n");
    }

    index = CTC_CLI_GET_ARGC_INDEX("discard-ttl-0");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_DISCARD_TTL_0_PKT;
        ctc_cli_out("Show chip discard-ttl-0 info\n");
        ctc_cli_out("==================================\n");
    }

    index = CTC_CLI_GET_ARGC_INDEX("discard-mcast-macsa");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_DISCARD_MCAST_SA_PKT;
        ctc_cli_out("Show chip discard-mcast-macsa info\n");
        ctc_cli_out("==================================\n");
    }

    index = CTC_CLI_GET_ARGC_INDEX("discard-tcp-syn-0");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_DISCARD_TCP_SYN_0_PKT;
        ctc_cli_out("Show chip discard-tcp-syn-0 info\n");
        ctc_cli_out("==================================\n");
    }

    index = CTC_CLI_GET_ARGC_INDEX("discard-tcp-null");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_DISCARD_TCP_NULL_PKT;
        ctc_cli_out("Show chip discard-tcp-null info\n");
        ctc_cli_out("==================================\n");
    }

    index = CTC_CLI_GET_ARGC_INDEX("discard-tcp-xmas");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_DISCARD_TCP_XMAS_PKT;
        ctc_cli_out("Show chip discard-tcp-xmas info\n");
        ctc_cli_out("==================================\n");
    }

    index = CTC_CLI_GET_ARGC_INDEX("discard-tcp-syn-fin");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_DISCARD_TCP_SYN_FIN_PKT;
        ctc_cli_out("Show chip discard-tcp-syn-fin info\n");
        ctc_cli_out("==================================\n");
    }

    index = CTC_CLI_GET_ARGC_INDEX("discard-same-l4-port");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_DISCARD_SAME_L4_PORT_PKT;
        ctc_cli_out("Show chip discard-same-l4-port info\n");
        ctc_cli_out("==================================\n");
    }

    index = CTC_CLI_GET_ARGC_INDEX("discard-icmp-fragment");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_DISCARD_ICMP_FRAG_PKT;
        ctc_cli_out("Show chip discard-icmp-fragment info\n");
        ctc_cli_out("==================================\n");
    }

    index = CTC_CLI_GET_ARGC_INDEX("acl-change-cos-only");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_ACL_CHANGE_COS_ONLY;
        ctc_cli_out("Show chip acl-change-cos-only info\n");
        ctc_cli_out("==================================\n");
    }

    index = CTC_CLI_GET_ARGC_INDEX("eloop-use-logic-destport");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_ELOOP_USE_LOGIC_DESTPORT;
        ctc_cli_out("Show chip eloop-use-logic-destport info\n");
        ctc_cli_out("==================================\n");
    }

    index = CTC_CLI_GET_ARGC_INDEX("arp-macda-check-en");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_ARP_MACDA_CHECK_EN;
        ctc_cli_out("Show chip arp-macda-check-en info\n");
        ctc_cli_out("==================================\n");
    }

    index = CTC_CLI_GET_ARGC_INDEX("arp-macsa-check-en");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_ARP_MACSA_CHECK_EN;
        ctc_cli_out("Show chip arp-macsa-check-en info\n");
        ctc_cli_out("==================================\n");
    }

    index = CTC_CLI_GET_ARGC_INDEX("arp-ip-check-en");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_ARP_IP_CHECK_EN;
        ctc_cli_out("Show chip arp-ip-check-en info\n");
        ctc_cli_out("==================================\n");
    }

    index = CTC_CLI_GET_ARGC_INDEX("arp-check-fail-to-cpu");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_ARP_CHECK_FAIL_TO_CPU;
        ctc_cli_out("Show chip arp-check-fail-to-cpu info\n");
        ctc_cli_out("==================================\n");
    }
    index = CTC_CLI_GET_ARGC_INDEX("arp-gratuitous-to-cpu");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_GRATUITOUS_ARP_TO_CPU;
        ctc_cli_out("Show chip arp-gratuitous-to-cpu info\n");
        ctc_cli_out("==================================\n");
    }
    index = CTC_CLI_GET_ARGC_INDEX("arp-local-check-en");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_ARP_LOCAL_CHECK_EN;
        ctc_cli_out("Show chip arp-local-check-en info\n");
        ctc_cli_out("==================================\n");
    }
    index = CTC_CLI_GET_ARGC_INDEX("nh-force-bridge-dis");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_NH_FORCE_BRIDGE_DISABLE;
        ctc_cli_out("Show chip nh-force-bridge-dis info\n");
        ctc_cli_out("==================================\n");
    }
    index = CTC_CLI_GET_ARGC_INDEX("nh-mcast-logic-rep-en");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_NH_MCAST_LOGIC_REP_EN;
        ctc_cli_out("Show chip nh-mcast-logic-rep-en info\n");
        ctc_cli_out("==================================\n");
    }
    index = CTC_CLI_GET_ARGC_INDEX("oam-policer-en");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_OAM_POLICER_EN;
        ctc_cli_out("Show chip oam-policer-en info\n");
        ctc_cli_out("==================================\n");
    }

    index = CTC_CLI_GET_ARGC_INDEX("parser-outer-always-cvlan");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_PARSER_OUTER_ALWAYS_CVLAN_EN;
        ctc_cli_out("Show chip parser-outer-always-cvlan info\n");
        ctc_cli_out("==================================\n");
    }

    index = CTC_CLI_GET_ARGC_INDEX("vpws-snooping-parser");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_VPWS_SNOOPING_PARSER;
        ctc_cli_out("Show chip vpws-snooping-parser info\n");
        ctc_cli_out("==================================\n");
    }
    index = CTC_CLI_GET_ARGC_INDEX("arp-vlan-class-en");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_ARP_VLAN_CLASS_EN;
        ctc_cli_out("Show chip arp-vlan-class-en info\n");
        ctc_cli_out("==================================\n");
    }
    index = CTC_CLI_GET_ARGC_INDEX("discard-macsa-0");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_DISCARD_MACSA_0_PKT;
        ctc_cli_out("Show chip discard-macsa-0 info\n");
        ctc_cli_out("==================================\n");
    }
    index = CTC_CLI_GET_ARGC_INDEX("disable-egs-stk-acl");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_EGS_STK_ACL_DIS;
        ctc_cli_out("Show chip disable-egs-stk-acl info\n");
        ctc_cli_out("==================================\n");
    }
    index = CTC_CLI_GET_ARGC_INDEX("stk-with-igs-pkt-hdr");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_STK_WITH_IGS_PKT_HDR_EN;
        ctc_cli_out("Show chip stk-with-igs-pkt-hdr info\n");
        ctc_cli_out("==================================\n");
    }
    index = CTC_CLI_GET_ARGC_INDEX("router-mac-match");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_L2_RMAC_MATCH_EN;
        ctc_cli_out("Show chip router-mac-match info\n");
        ctc_cli_out("==================================\n");
    }
    index = CTC_CLI_GET_ARGC_INDEX("net-rx");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_NET_RX_EN;
        ctc_cli_out("Show chip net rx info\n");
        ctc_cli_out("==================================\n");
    }
    index = CTC_CLI_GET_ARGC_INDEX("sid-edit-mode");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_SID_EDIT_MODE;
        p_value = &value;
        ctc_cli_out("Show chip sid-edit-mode info\n");
        ctc_cli_out("==================================\n");
    }
    index = CTC_CLI_GET_ARGC_INDEX("discard-tcp-frag-1");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_DISCARD_TCP_FRAG_OFFSET_1_PKT;
        ctc_cli_out("Show chip discard-tcp-frag-1 info\n");
        ctc_cli_out("==================================\n");
    }
    if(g_ctcs_api_en)
    {
         ret = ctcs_global_ctl_get(g_api_ldev, type, p_value);
    }
    else
    {
        ret = ctc_global_ctl_get(type, p_value);
    }

    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    if (CTC_GLOBAL_SID_EDIT_MODE != type)
    {
        ctc_cli_out("value : %d\n", enable?1:0);
    }
    else
    {
        ctc_cli_out("value : %u\n", value);
    }

    ctc_cli_out("==================================\n");

    return ret;

}

CTC_CLI(ctc_cli_chip_global_dlb_mode,
        ctc_cli_chip_global_dlb_mode_cmd,
        "chip global-cfg ecmp (reblance-mode (normal|first|packet) | dlb-mode (elephant|tcp|all))",
        "chip module",
        "Global config",
        "ECMP config",
        "ECMP DLB reblance mode",
        "Normal mode, inactive flow do reblance",
        "First mode, only new flow do reblance",
        "Packet mode, every 256 packets do reblance",
        "ECMP DLB flow mode",
        "Elephant flow do DLB",
        "Tcp flow do DLB",
        "All flow do DLB")
{
    int32 ret = CLI_SUCCESS;
    uint32 val = 0;
    uint8 type = 0;
    uint8 index = 0;

    index = CTC_CLI_GET_ARGC_INDEX("reblance-mode");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_ECMP_REBALANCE_MODE;

        index = CTC_CLI_GET_ARGC_INDEX("normal");
        if (INDEX_VALID(index))
        {
            val = CTC_GLOBAL_ECMP_REBALANCE_MODE_NORMAL;
        }

        index = CTC_CLI_GET_ARGC_INDEX("first");
        if (INDEX_VALID(index))
        {
            val = CTC_GLOBAL_ECMP_REBALANCE_MODE_FIRST;
        }

        index = CTC_CLI_GET_ARGC_INDEX("packet");
        if (INDEX_VALID(index))
        {
            val = CTC_GLOBAL_ECMP_REBALANCE_MODE_PACKET;
        }
    }

    index = CTC_CLI_GET_ARGC_INDEX("dlb-mode");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_ECMP_DLB_MODE;

        index = CTC_CLI_GET_ARGC_INDEX("elephant");
        if (INDEX_VALID(index))
        {
            val = CTC_GLOBAL_ECMP_DLB_MODE_ELEPHANT;
        }

        index = CTC_CLI_GET_ARGC_INDEX("tcp");
        if (INDEX_VALID(index))
        {
            val = CTC_GLOBAL_ECMP_DLB_MODE_TCP;
        }

        index = CTC_CLI_GET_ARGC_INDEX("all");
        if (INDEX_VALID(index))
        {
            val = CTC_GLOBAL_ECMP_DLB_MODE_ALL;
        }
    }

    if(g_ctcs_api_en)
    {
         ret = ctcs_global_ctl_set(g_api_ldev, type, &val);
    }
    else
    {
        ret = ctc_global_ctl_set(type, &val);
    }

    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;

}

CTC_CLI(ctc_cli_chip_get_global_dlb_mode,
        ctc_cli_chip_get_global_dlb_mode_cmd,
        "show chip global-cfg ecmp (reblance-mode | dlb-mode)",
        "Show",
        "Chip module",
        "Global config",
        "ECMP config",
        "ECMP DLB reblance mode,1:normal,2:first,3:packet",
        "ECMP DLB flow mode,1:all,2:elephant,3:tcp")
{
    int32 ret = CLI_SUCCESS;
    uint32 val = 0;
    uint8 type = 0;
    uint8 index = 0;

    index = CTC_CLI_GET_ARGC_INDEX("reblance-mode");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_ECMP_REBALANCE_MODE;
        ctc_cli_out("Show chip ecmp reblance-mode info\n");
        ctc_cli_out("==================================\n");
    }

    index = CTC_CLI_GET_ARGC_INDEX("dlb-mode");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_ECMP_DLB_MODE;
        ctc_cli_out("Show chip ecmp dlb-mode info\n");
        ctc_cli_out("==================================\n");
    }

    if(g_ctcs_api_en)
    {
         ret = ctcs_global_ctl_get(g_api_ldev, type, &val);
    }
    else
    {
        ret = ctc_global_ctl_get(type, &val);
    }

    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("value : %d\n", val);
    ctc_cli_out("==================================\n");

    return ret;

}

CTC_CLI(ctc_cli_chip_global_dlb_cfg,
        ctc_cli_chip_global_dlb_cfg_cmd,
        "chip global-cfg (ecmp (flow-aging-interval|flow-inactive-interval|flow-pkt-interval)|\
        linkagg (flow-inactive-interval|lsh-hash-offset|spm-hash-offset|spm-aging-interval) | \
        stacking-trunk (flow-inactive-interval|lsh-hash-offset|port-hash-en)) value VALUE",
        "Chip module",
        "Global config",
        "ECMP config",
        "ECMP DLB flow aging time, uint:ms, value 0:disable flow aging",
        "ECMP DLB flow inactive time, uint:us",
        "ECMP DLB rebalance packets interval",
        "Linkagg config",
        "Linkagg DLB flow inactive time, uint:ms",
        "Linkagg LSH hash offset",
        "Linkagg session preservation flow LB hash offset",
        "Linkagg session preservation mechanism aging timer interval, 0 means disable",
        "Stacking trunk config",
        "Stacking trunk DLB flow inactive time, uint:ms",
        "Stacking trunk LSH hash offset",
        "Stacking port hash en",
        "Value",
        "Value")
{
    int32 ret       = CLI_SUCCESS;
    uint32 val = 0;
    uint8 type = 0;
    uint8 index = 0;
    uint8 is_lag_lsh_hash = 0;
    uint8 is_lag_spm_hash = 0;
    uint8 is_stk_lsh_hash = 0;
    uint8 is_stk_port_hash_en = 0;
    ctc_lb_hash_global_property_t lb_hash_glb_prop;
    sal_memset(&lb_hash_glb_prop, 0, sizeof(ctc_lb_hash_global_property_t));
    index = CTC_CLI_GET_ARGC_INDEX("ecmp");
    if (INDEX_VALID(index))
    {
        index = CTC_CLI_GET_ARGC_INDEX("flow-aging-interval");
        if (INDEX_VALID(index))
        {
            type = CTC_GLOBAL_ECMP_FLOW_AGING_INTERVAL;
        }

        index = CTC_CLI_GET_ARGC_INDEX("flow-inactive-interval");
        if (INDEX_VALID(index))
        {
            type = CTC_GLOBAL_ECMP_FLOW_INACTIVE_INTERVAL;
        }

        index = CTC_CLI_GET_ARGC_INDEX("flow-pkt-interval");
        if (INDEX_VALID(index))
        {
            type = CTC_GLOBAL_ECMP_FLOW_PKT_INTERVAL;
        }
    }

    index = CTC_CLI_GET_ARGC_INDEX("linkagg");
    if (INDEX_VALID(index))
    {
        index = CTC_CLI_GET_ARGC_INDEX("flow-inactive-interval");
        if (INDEX_VALID(index))
        {
            type = CTC_GLOBAL_LINKAGG_FLOW_INACTIVE_INTERVAL;
        }

        index = CTC_CLI_GET_ARGC_INDEX("lsh-hash-offset");
        if (INDEX_VALID(index))
        {
            is_lag_lsh_hash = 1;
        }

        index = CTC_CLI_GET_ARGC_INDEX("spm-hash-offset");
        if (INDEX_VALID(index))
        {
            is_lag_spm_hash = 1;
        }

        index = CTC_CLI_GET_ARGC_INDEX("spm-aging-interval");
        if (INDEX_VALID(index))
        {
            type = CTC_GLOBAL_SPM_AGING_INTERVAL;
        }
    }

    index = CTC_CLI_GET_ARGC_INDEX("stacking-trunk");
    if (INDEX_VALID(index))
    {
        index = CTC_CLI_GET_ARGC_INDEX("flow-inactive-interval");
        if (INDEX_VALID(index))
        {
            type = CTC_GLOBAL_STACKING_TRUNK_FLOW_INACTIVE_INTERVAL;
        }

        index = CTC_CLI_GET_ARGC_INDEX("lsh-hash-offset");
        if (INDEX_VALID(index))
        {
            is_stk_lsh_hash = 1;
        }
        index = CTC_CLI_GET_ARGC_INDEX("port-hash-en");
        if (INDEX_VALID(index))
        {
            is_stk_port_hash_en = 1;
        }
    }

    CTC_CLI_GET_UINT32_RANGE("value", val, argv[2], 0, CTC_MAX_UINT32_VALUE);

    if (is_lag_lsh_hash || is_lag_spm_hash || is_stk_lsh_hash || is_stk_port_hash_en)
    {
        if(g_ctcs_api_en)
        {
            ret = ctcs_global_ctl_get(g_api_ldev, CTC_GLOBAL_LB_HASH_GLOBAL_PROPERTY, &lb_hash_glb_prop);
            lb_hash_glb_prop.linkagg_lsh_hash_offset = is_lag_lsh_hash?val:lb_hash_glb_prop.linkagg_lsh_hash_offset;
            lb_hash_glb_prop.linkagg_spm_hash_offset = is_lag_spm_hash?val:lb_hash_glb_prop.linkagg_spm_hash_offset;
            lb_hash_glb_prop.stacking_lsh_hash_offset = is_stk_lsh_hash?val:lb_hash_glb_prop.stacking_lsh_hash_offset;
            lb_hash_glb_prop.stacking_port_hash_en = is_stk_port_hash_en?val:lb_hash_glb_prop.stacking_port_hash_en;
            ret = ctcs_global_ctl_set(g_api_ldev, CTC_GLOBAL_LB_HASH_GLOBAL_PROPERTY, &lb_hash_glb_prop);
        }
        else
        {
            ret = ctc_global_ctl_get(CTC_GLOBAL_LB_HASH_GLOBAL_PROPERTY, &lb_hash_glb_prop);
            lb_hash_glb_prop.linkagg_lsh_hash_offset = is_lag_lsh_hash?val:lb_hash_glb_prop.linkagg_lsh_hash_offset;
            lb_hash_glb_prop.linkagg_spm_hash_offset = is_lag_spm_hash?val:lb_hash_glb_prop.linkagg_spm_hash_offset;
            lb_hash_glb_prop.stacking_lsh_hash_offset = is_stk_lsh_hash?val:lb_hash_glb_prop.stacking_lsh_hash_offset;
            lb_hash_glb_prop.stacking_port_hash_en = is_stk_port_hash_en?val:lb_hash_glb_prop.stacking_port_hash_en;
            ret = ctc_global_ctl_set(CTC_GLOBAL_LB_HASH_GLOBAL_PROPERTY, &lb_hash_glb_prop);
        }
    }
    else
    {
        if(g_ctcs_api_en)
        {
             ret = ctcs_global_ctl_set(g_api_ldev, type, &val);
        }
        else
        {
            ret = ctc_global_ctl_set(type, &val);
        }
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;

}

CTC_CLI(ctc_cli_chip_get_global_dlb_cfg,
        ctc_cli_chip_get_global_dlb_cfg_cmd,
        "show chip global-cfg (ecmp (flow-aging-interval|flow-inactive-interval|flow-pkt-interval)| \
        linkagg (flow-inactive-interval|lsh-hash-offset|spm-hash-offset|spm-aging-interval)| \
        stacking-trunk (flow-inactive-interval|lsh-hash-offset|port-hash-value))",
        "Show",
        "Chip module",
        "Global config",
        "ECMP config",
        "ECMP DLB flow aging time, uint:ms, value 0:disable flow aging",
        "ECMP DLB flow inactive time, uint:us",
        "ECMP DLB rebalance packets interval",
        "Linkagg config",
        "Linkagg DLB flow inactive time, uint:ms",
        "Linkagg LSH hash offset",
        "Linkagg session preservation flow LB hash offset",
        "Linkagg session preservation mechanism aging timer interval, 0 means disable",
        "Stacking trunk config",
        "Stacking trunk DLB flow inactive time, uint:ms",
        "Stacking trunk LSH hash offset",
        "Stacking port hash en")
{
    int32 ret       = CLI_SUCCESS;
    uint32 val = 0;
    uint8 type = 0;
    uint8 index = 0;
    uint8 is_lag_lsh_hash = 0;
    uint8 is_lag_spm_hash = 0;
    uint8 is_stk_lsh_hash = 0;
    uint8 is_stk_port_hash_en = 0;
    ctc_lb_hash_global_property_t lb_hash_glb_prop;
    sal_memset(&lb_hash_glb_prop, 0, sizeof(ctc_lb_hash_global_property_t));
    index = CTC_CLI_GET_ARGC_INDEX("ecmp");
    if (INDEX_VALID(index))
    {
        index = CTC_CLI_GET_ARGC_INDEX("flow-aging-interval");
        if (INDEX_VALID(index))
        {
            type = CTC_GLOBAL_ECMP_FLOW_AGING_INTERVAL;
            ctc_cli_out("Show chip ecmp flow-aging-interval(ms) info\n");
            ctc_cli_out("==================================\n");
        }

        index = CTC_CLI_GET_ARGC_INDEX("flow-inactive-interval");
        if (INDEX_VALID(index))
        {
            type = CTC_GLOBAL_ECMP_FLOW_INACTIVE_INTERVAL;
            ctc_cli_out("Show chip ecmp flow-inactive-interval(us) info\n");
            ctc_cli_out("==================================\n");
        }

        index = CTC_CLI_GET_ARGC_INDEX("flow-pkt-interval");
        if (INDEX_VALID(index))
        {
            type = CTC_GLOBAL_ECMP_FLOW_PKT_INTERVAL;
            ctc_cli_out("Show chip ecmp flow-pkt-interval info\n");
            ctc_cli_out("==================================\n");
        }
    }

    index = CTC_CLI_GET_ARGC_INDEX("linkagg");
    if (INDEX_VALID(index))
    {
        index = CTC_CLI_GET_ARGC_INDEX("flow-inactive-interval");
        if (INDEX_VALID(index))
        {
            type = CTC_GLOBAL_LINKAGG_FLOW_INACTIVE_INTERVAL;
            ctc_cli_out("Show chip linkagg flow-inactive-interval(ms) info\n");
            ctc_cli_out("==================================\n");
        }

        index = CTC_CLI_GET_ARGC_INDEX("lsh-hash-offset");
        if (INDEX_VALID(index))
        {
            is_lag_lsh_hash = 1;
            ctc_cli_out("Show chip linkagg lsh-hash-offset info\n");
            ctc_cli_out("==================================\n");
        }

        index = CTC_CLI_GET_ARGC_INDEX("spm-hash-offset");
        if (INDEX_VALID(index))
        {
            is_lag_spm_hash = 1;
            ctc_cli_out("Show chip linkagg spm-hash-offset info\n");
            ctc_cli_out("==================================\n");
        }

        index = CTC_CLI_GET_ARGC_INDEX("spm-aging-interval");
        if (INDEX_VALID(index))
        {
            type = CTC_GLOBAL_SPM_AGING_INTERVAL;
            ctc_cli_out("Show chip linkagg spm-aging-interval info\n");
            ctc_cli_out("==================================\n");
        }
    }

    index = CTC_CLI_GET_ARGC_INDEX("stacking-trunk");
    if (INDEX_VALID(index))
    {
        index = CTC_CLI_GET_ARGC_INDEX("flow-inactive-interval");
        if (INDEX_VALID(index))
        {
            type = CTC_GLOBAL_STACKING_TRUNK_FLOW_INACTIVE_INTERVAL;
            ctc_cli_out("Show chip stacking-trunk flow-inactive-interval(ms) info\n");
            ctc_cli_out("==================================\n");
        }

        index = CTC_CLI_GET_ARGC_INDEX("lsh-hash-offset");
        if (INDEX_VALID(index))
        {
            is_stk_lsh_hash = 1;
            ctc_cli_out("Show chip stacking-trunk lsh-hash-offset info\n");
            ctc_cli_out("==================================\n");
        }
        index = CTC_CLI_GET_ARGC_INDEX("port-hash-value");
        if (INDEX_VALID(index))
        {
            is_stk_port_hash_en = 1;
            ctc_cli_out("Show chip stacking-trunk port-hash-en info\n");
            ctc_cli_out("==================================\n");
        }
    }
    if (is_lag_lsh_hash || is_lag_spm_hash || is_stk_lsh_hash || is_stk_port_hash_en)
    {
        if(g_ctcs_api_en)
        {
            ret = ctcs_global_ctl_get(g_api_ldev, CTC_GLOBAL_LB_HASH_GLOBAL_PROPERTY, &lb_hash_glb_prop);
            val = is_lag_lsh_hash?lb_hash_glb_prop.linkagg_lsh_hash_offset:val;
            val = is_lag_spm_hash?lb_hash_glb_prop.linkagg_spm_hash_offset:val;
            val = is_stk_lsh_hash?lb_hash_glb_prop.stacking_lsh_hash_offset:val;
            val = is_stk_port_hash_en?lb_hash_glb_prop.stacking_port_hash_en:val;
        }
        else
        {
            ret = ctc_global_ctl_get(CTC_GLOBAL_LB_HASH_GLOBAL_PROPERTY, &lb_hash_glb_prop);
            val = is_lag_lsh_hash?lb_hash_glb_prop.linkagg_lsh_hash_offset:val;
            val = is_lag_spm_hash?lb_hash_glb_prop.linkagg_spm_hash_offset:val;
            val = is_stk_lsh_hash?lb_hash_glb_prop.stacking_lsh_hash_offset:val;
            val = is_stk_port_hash_en?lb_hash_glb_prop.stacking_port_hash_en:val;
        }
    }
    else
    {
        if(g_ctcs_api_en)
        {
             ret = ctcs_global_ctl_get(g_api_ldev, type, &val);
        }
        else
        {
            ret = ctc_global_ctl_get(type, &val);
        }
    }

    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("value : %d\n", val);
    ctc_cli_out("==================================\n");

    if(is_lag_lsh_hash || is_lag_spm_hash || is_stk_lsh_hash)
    {
        ctc_cli_out("select group id(4 select group):%d\n", val / 32);
        ctc_cli_out("select group id(8 select group):%d\n", val / 16);
    }
    return ret;

}

CTC_CLI(ctc_cli_chip_global_lag_dlb_prop,
        ctc_cli_chip_global_lag_dlb_prop_cmd,
        "chip global-cfg lag-dlb mode VALUE {ewma (enable|disable)|port-weight VALUE|queue-weight VALUE|queue-percent VALUE| inteval VALUE}",
        "Chip module",
        "Global config",
        "Lag DLB config",
        "Lag DLB mode",
        "Mode value",
        "Lag DLB ewma config",
        "Lag DLB ewma compute avg port load and qdepth enable",
        "Lag DLB ewma compute avg port load and qdepth disable",
        "Lag DLB ewma weight for computing avg port load",
        "Port-weight value",
        "Lag DLB ewma weight for computing avg queue count",
        "Queue-weight value",
        "Lag DLB queue percent weight",
        "Queue percent value",
        "Interval",
        "Interval value")
{
    int32 ret = CLI_SUCCESS;
    uint8 index = 0;
    ctc_global_lag_dlb_property_t lag_dlb_prop;

    sal_memset(&lag_dlb_prop, 0, sizeof(ctc_global_lag_dlb_property_t));

    CTC_CLI_GET_UINT8_RANGE("mode", lag_dlb_prop.mode, argv[0], 0, CTC_LAG_DLB_MODE_MAX - 1);

    index = CTC_CLI_GET_ARGC_INDEX("enable");
    if (INDEX_VALID(index))
    {
        lag_dlb_prop.calc_type = 1;
    }

    index = CTC_CLI_GET_ARGC_INDEX("port-weight");
    if (INDEX_VALID(index))
    {
        CTC_CLI_GET_UINT8("port-weight", lag_dlb_prop.port_weight, argv[index + 1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("queue-weight");
    if (INDEX_VALID(index))
    {
        CTC_CLI_GET_UINT8("queue-weight", lag_dlb_prop.queue_weight, argv[index + 1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("queue-percent");
    if (INDEX_VALID(index))
    {
        CTC_CLI_GET_UINT8("queue-percent", lag_dlb_prop.queue_percent, argv[index + 1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("inteval");
    if (INDEX_VALID(index))
    {
        CTC_CLI_GET_UINT32("inteval", lag_dlb_prop.interval, argv[index + 1]);
    }

    if(g_ctcs_api_en)
    {
         ret = ctcs_global_ctl_set(g_api_ldev, CTC_GLOBAL_LAG_DLB_PROPERTY, &lag_dlb_prop);
    }
    else
    {
        ret = ctc_global_ctl_set(CTC_GLOBAL_LAG_DLB_PROPERTY, &lag_dlb_prop);
    }

    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }
    return ret;

}

CTC_CLI(ctc_cli_chip_get_global_lag_dlb_prop,
        ctc_cli_chip_get_global_lag_dlb_prop_cmd,
        "show chip global-cfg lag-dlb",
        "Show",
        "Chip module",
        "Global config",
        "Lag DLB ewma info")
{

    int32 ret  = CLI_SUCCESS;

    ctc_global_lag_dlb_property_t lag_dlb_prop;

    sal_memset(&lag_dlb_prop, 0, sizeof(ctc_global_lag_dlb_property_t));

    if(g_ctcs_api_en)
    {
        ret = ctcs_global_ctl_get(g_api_ldev, CTC_GLOBAL_LAG_DLB_PROPERTY, &lag_dlb_prop);
    }
    else
    {
        ret = ctc_global_ctl_get(CTC_GLOBAL_LAG_DLB_PROPERTY, &lag_dlb_prop);
    }

    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("==================================\n");
    ctc_cli_out("mode               : %d\n", lag_dlb_prop.mode);
    ctc_cli_out("queue_percent      : %d\n", lag_dlb_prop.queue_percent);
    ctc_cli_out("ewma_en            : %d\n", lag_dlb_prop.calc_type);
    ctc_cli_out("load_weight        : %d\n", lag_dlb_prop.port_weight);
    ctc_cli_out("queue_weight       : %d\n", lag_dlb_prop.queue_weight);
    ctc_cli_out("inteval            : %d\n", lag_dlb_prop.interval);

    ctc_cli_out("==================================\n");

    return ret;

}

CTC_CLI(ctc_cli_chip_global_flow_prop,
        ctc_cli_chip_global_flow_prop_cmd,
        "chip global-cfg flow-property {igs-vlan-range-mode VALUE | egs-vlan-range-mode VALUE}",
        "Chip module",
        "Global config",
        "Flow property config",
        "Ingress vlan range mode",
        "Value",
        "Egress vlan range mode",
        "Value")
{
    int32 ret = CLI_SUCCESS;
    uint8 index = 0;
    ctc_global_flow_property_t flow_prop;

    sal_memset(&flow_prop, 0, sizeof(ctc_global_flow_property_t));

    if(g_ctcs_api_en)
    {
        ret = ctcs_global_ctl_get(g_api_ldev, CTC_GLOBAL_FLOW_PROPERTY, &flow_prop);
    }
    else
    {
        ret = ctc_global_ctl_get(CTC_GLOBAL_FLOW_PROPERTY, &flow_prop);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    index = CTC_CLI_GET_ARGC_INDEX("igs-vlan-range-mode");
    if (index != 0xFF)
    {
        CTC_CLI_GET_UINT8("igs-vlan-range-mode",flow_prop.igs_vlan_range_mode,argv[index + 1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("egs-vlan-range-mode");
    if (index != 0xFF)
    {
        CTC_CLI_GET_UINT8("egs-vlan-range-mode",flow_prop.egs_vlan_range_mode,argv[index + 1]);
    }

    if(g_ctcs_api_en)
    {
         ret = ctcs_global_ctl_set(g_api_ldev, CTC_GLOBAL_FLOW_PROPERTY, &flow_prop);
    }
    else
    {
        ret = ctc_global_ctl_set(CTC_GLOBAL_FLOW_PROPERTY, &flow_prop);
    }

    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;

}

CTC_CLI(ctc_cli_chip_get_global_flow_prop,
        ctc_cli_chip_get_global_flow_prop_cmd,
        "show chip global-cfg flow-property",
        "Show",
        "Chip module",
        "Global config",
        "Flow property config")
{
    int32 ret = CLI_SUCCESS;
    uint8 type = 0;
    ctc_global_flow_property_t flow_prop;

    sal_memset(&flow_prop, 0, sizeof(ctc_global_flow_property_t));

    type = CTC_GLOBAL_FLOW_PROPERTY;

    if(g_ctcs_api_en)
    {
         ret = ctcs_global_ctl_get(g_api_ldev, type, &flow_prop);
    }
    else
    {
        ret = ctc_global_ctl_get(type, &flow_prop);
    }

    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("Show chip flow-property info\n");
    ctc_cli_out("==============================\n");
    ctc_cli_out("igs-vlan-range-mode : %d\n", flow_prop.igs_vlan_range_mode);
    ctc_cli_out("egs-vlan-range-mode : %d\n", flow_prop.egs_vlan_range_mode);
    ctc_cli_out("==============================\n");

    return ret;

}

CTC_CLI(ctc_cli_chip_global_acl_property,
        ctc_cli_chip_global_acl_property_cmd,
        "chip global-cfg acl-property direction (ingress|egress|both) (priority VALUE |) "\
        "{discard-pkt-lkup-en VALUE | key-ipv6-da-addr-mode VALUE | key-ipv6-sa-addr-mode VALUE | key-cid-en VALUE {cid-mode MODE|}" \
        "|cid-key-ipv6-da-addr-mode VALUE | cid-key-ipv6-sa-addr-mode VALUE | key-ctag-en VALUE " \
        "|l3-key-ipv6-use-compress-addr VALUE| copp-key-use-ext-mode L3TYPE_BITMAP|l2l3-ext-key-use-l2l3-key L3TYPE_BITMAP|\
        stp-blocked-pkt-lkup-en VALUE | random-log-pri VALUE|l2-type-as-vlan-num  VALUE|fwd-ext-key-l2-hdr-en VALUE| stk-hdr-key-en VALUE|\
        key-stk-hdr-en VALUE|glb-acl-presel-en VALUE|mpls-im-en VALUE|copp-key-use-udf VALUE|copp-ext-key-use-udf VALUE|copp-key-fid-en VALUE | fwd-key-fid-en VALUE | l2l3-key-support-fid-en VALUE|\
        acl-key-use-arp-mac-sa VALUE | acl-key-use-arp-mac-da VALUE | acl-action-fid-en VALUE | action-pri ACTIONPRI | mac-ipv6-key-u0-mode VALUE | mac-ipv6-key-u1-mode VALUE | l2l3-key-u2-mode VALUE |\
        l2l3-key-u3-mode VALUE | eco-en VALUE | oam-pkt-lkup-dis VALUE |}" ,
        "Chip module",
        "Global config",
        "Acl property",
        "Direction",
        "Ingress",
        "Egress",
        "Both",
        "Priority",
        "ACL priority (ACL lookup level)",
        "Discard pkt lkup en ",
        "If set,indicate the discarded packets will do ACL lookup",
        "Key ipv6 da addr mode",
        "Ipv6 address compress mode,refer to ctc_global_ipv6_addr_compress_mode_t",
        "Key ipv6 sa addr mode",
        "Ipv6 address compress mode,refer to ctc_global_ipv6_addr_compress_mode_t",
        "Key cid en",
        "If set, key enable CID",
        "Cid mode",
        "Cid mode value",
        "Cid key ipv6 da addr mode",
        "Ipv6 address compress mode,refer to ctc_global_ipv6_addr_compress_mode_t",
        "Cid key ipv6 sa addr mode",
        "Ipv6 address compress mode,refer to ctc_global_ipv6_addr_compress_mode_t",
        "Key ctag en",
        "If set, key vlan tag will be used as CVLAN",
        "L3-key use compress-address for ipv6",
        "If set,ipv6 address use compress mode (64 bit ipaddr) in L3 Key",
        "Which L3Type's packet will use copp ext key",
        "L3 Type Bitmap, only ipv6 use copp ext key by default",
        "Force L2L3Ext Key To L2L3Key",
        "L3 Type Bitmap, only ipv4/ipv6 use L2L3Ext key by default",
        "Stp bloacked packet do ACL lookup",
        "VAlUE",
        "Random Log mapped new acl priority",
        "VAlUE",
        "L2 type as vlan number", "VALUE",
        "Forward ext key l2 header enable",
        "If set, forward ext key will include l2 header fields, else include UDF fields",
        "Stacking header as acl lookup key enable",
        "If set, stacking header as acl lookup key , consume once lookup",
        "Key stk hdr en",
        "If set, key stk hdr will be used",
        "Enable acl global presel",
        "If set, enable acl global presel",
        "Enable mpls im", "value",
        "Copp key use udf", "value",
        "Copp ext key use udf", "value",
        "COPP key support fid",
        "If set, copp key and copp ext key can support CTC_FIELD_KEY_FID and  do not support CTC_FIELD_KEY_DST_NHID",
        "forward key support fid",
        "If set, forward key and forward ext key can support CTC_FIELD_KEY_FID and  do not support CTC_FIELD_KEY_DST_NHID",
        "Macl3 key support fid",
        "If set, macl3 ext key and macipv6 ext key can support CTC_FIELD_KEY_FID and  do not support CTC_FIELD_KEY_CVLAN_RANGE and CTC_FIELD_KEY_CTAG_COS",
        "Acl key use arp macsa",
        "If set, acl key use sender mac as macsa when ArpPkt",
        "Acl key use arp macda",
        "If set, acl key use sender mac as macda when ArpPkt",
        "Acl action fid en", "If set , acl actiion support fid",
        "Acl action priority", "action priority value",
        "Acl mac ipv6 key u0 mode","value",
        "Acl mac ipv6 key u1 mode","value",
        "Acl l2l3 key u2 mode","value",
        "Acl l2l3 key u3 mode","value",
        "Eco enable", "value",
        "OAM pkt lkup disable ",
        "If set,indicate acl will not lookup OAM packets")
{
    int32  ret = CLI_SUCCESS;
    uint8  index = 0;

	uint32 value = 0;
	uint8  loop = 0;

    ctc_global_acl_property_t acl_property;
    sal_memset(&acl_property,0,sizeof(ctc_global_acl_property_t));

    /*direction*/
    acl_property.dir = CTC_BOTH_DIRECTION;
    index = CTC_CLI_GET_ARGC_INDEX("ingress");
    if (INDEX_VALID(index))
    {
        acl_property.dir = CTC_INGRESS;
    }

    index = CTC_CLI_GET_ARGC_INDEX("egress");
    if (INDEX_VALID(index))
    {
        acl_property.dir = CTC_EGRESS;
    }

    index = CTC_CLI_GET_ARGC_INDEX("priority");
    if(index != 0xFF)
    {
       CTC_CLI_GET_UINT8("Priority", acl_property.lkup_level, argv[index+1]);
    }

    if(g_ctcs_api_en)
    {
        ret = ctcs_global_ctl_get(g_api_ldev, CTC_GLOBAL_ACL_PROPERTY, &acl_property);
    }
    else
    {
        ret = ctc_global_ctl_get(CTC_GLOBAL_ACL_PROPERTY, &acl_property);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }


    index = CTC_CLI_GET_ARGC_INDEX("discard-pkt-lkup-en");
    if(index != 0xFF)
    {
       CTC_CLI_GET_UINT8("Discard pkt lkup en", acl_property.discard_pkt_lkup_en, argv[index+1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("mpls-im-en");
    if(index != 0xFF)
    {
       CTC_CLI_GET_UINT8("mpls-im-en", acl_property.npm_im_en, argv[index+1]);
	   acl_property.l2l3_key_u2_mode = 0;
    }

    index = CTC_CLI_GET_ARGC_INDEX("key-ipv6-da-addr-mode");
    if(index != 0xFF)
    {
       CTC_CLI_GET_UINT8("Key ipv6 da addr mode", acl_property.key_ipv6_da_addr_mode, argv[index+1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("key-ipv6-sa-addr-mode");
    if(index != 0xFF)
    {
       CTC_CLI_GET_UINT8("Key ipv6 sa addr mode", acl_property.key_ipv6_sa_addr_mode, argv[index+1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("key-cid-en");
    if(index != 0xFF)
    {
       CTC_CLI_GET_UINT8("Key cid en", acl_property.key_cid_en, argv[index+1]);
       index = CTC_CLI_GET_ARGC_INDEX("cid-mode");
       if(index != 0xFF)
       {
            CTC_CLI_GET_UINT8("Key cid mode", acl_property.key_cid_mode, argv[index+1]);
       }
    }

    index = CTC_CLI_GET_ARGC_INDEX("cid-key-ipv6-da-addr-mode");
    if(index != 0xFF)
    {
       CTC_CLI_GET_UINT8("Cid key ipv6 da addr mode", acl_property.cid_key_ipv6_da_addr_mode, argv[index+1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("cid-key-ipv6-sa-addr-mode");
    if(index != 0xFF)
    {
       CTC_CLI_GET_UINT8("Cid key ipv6 sa addr mode", acl_property.cid_key_ipv6_sa_addr_mode, argv[index+1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("key-ctag-en");
    if(index != 0xFF)
    {
       CTC_CLI_GET_UINT8("Key ctag en", acl_property.key_ctag_en, argv[index+1]);
    }

	index = CTC_CLI_GET_ARGC_INDEX("l3-key-ipv6-use-compress-addr");
    if(index != 0xFF)
    {
       CTC_CLI_GET_UINT8("l3-key-ipv6-use-compress-addr", acl_property.l3_key_ipv6_use_compress_addr, argv[index+1]);
    }

	index = CTC_CLI_GET_ARGC_INDEX("copp-key-use-ext-mode");
    if(index != 0xFF)
    {
      CTC_CLI_GET_UINT32("copp-key-use-ext-mode",value, argv[index+1]);
      for(loop = 0;loop <MAX_CTC_PARSER_L3_TYPE;loop++ )
      {
		   acl_property.copp_key_use_ext_mode[loop] = CTC_IS_BIT_SET(value,loop);
      }

    }

	index = CTC_CLI_GET_ARGC_INDEX("l2l3-ext-key-use-l2l3-key");
    if(index != 0xFF)
    {
      CTC_CLI_GET_UINT32("l2l3-ext-key-use-l2l3-key",value, argv[index+1]);
      for(loop = 0;loop <MAX_CTC_PARSER_L3_TYPE;loop++ )
      {
		   acl_property.l2l3_ext_key_use_l2l3_key[loop] = CTC_IS_BIT_SET(value,loop);
      }

    }

    index = CTC_CLI_GET_ARGC_INDEX("stp-blocked-pkt-lkup-en");
    if(index != 0xFF)
    {
       CTC_CLI_GET_UINT8("Stp bloced pkt lkup en", acl_property.stp_blocked_pkt_lkup_en, argv[index+1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("random-log-pri");
    if(index != 0xFF)
    {
       CTC_CLI_GET_UINT8("Random log priority", acl_property.random_log_pri, argv[index+1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("l2-type-as-vlan-num");
    if(index != 0xFF)
    {
       CTC_CLI_GET_UINT8("L2 Type as vlan number en", acl_property.l2_type_as_vlan_num, argv[index+1]);
    }
    index = CTC_CLI_GET_ARGC_INDEX("fwd-ext-key-l2-hdr-en");
    if(index != 0xFF)
    {
       CTC_CLI_GET_UINT8("fwd-ext-key-l2-hdr-en", acl_property.fwd_ext_key_l2_hdr_en, argv[index+1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("stk-hdr-key-en");
    if(index != 0xFF)
    {
       CTC_CLI_GET_UINT8("stk-hdr-key-en", acl_property.stk_hdr_lkup_en, argv[index+1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("key-stk-hdr-en");
    if(index != 0xFF)
    {
       CTC_CLI_GET_UINT8("key-stk-hdr-en", acl_property.key_stk_hdr_en, argv[index+1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("glb-acl-presel-en");
    if(index != 0xFF)
    {
       CTC_CLI_GET_UINT8("glb-acl-presel-en", acl_property.glb_acl_presel_en, argv[index+1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("copp-key-use-udf");
    if(index != 0xFF)
    {
       CTC_CLI_GET_UINT8("copp-key-use-udf", acl_property.copp_key_use_udf, argv[index+1]);
    }
    index = CTC_CLI_GET_ARGC_INDEX("copp-ext-key-use-udf");
    if(index != 0xFF)
    {
       CTC_CLI_GET_UINT8("copp-ext-key-use-udf", acl_property.copp_ext_key_use_udf, argv[index+1]);
    }
    index = CTC_CLI_GET_ARGC_INDEX("copp-key-fid-en");
    if(index != 0xFF)
    {
       CTC_CLI_GET_UINT8("copp-key-fid-en", acl_property.copp_key_fid_en, argv[index+1]);
    }
    index = CTC_CLI_GET_ARGC_INDEX("fwd-key-fid-en");
    if(index != 0xFF)
    {
       CTC_CLI_GET_UINT8("fwd-key-fid-en", acl_property.fwd_key_fid_en, argv[index+1]);
    }
    index = CTC_CLI_GET_ARGC_INDEX("l2l3-key-support-fid-en");
    if(index != 0xFF)
    {
       CTC_CLI_GET_UINT8("l2l3-key-support-fid-en", acl_property.l2l3_key_fid_en, argv[index+1]);
    }
    index = CTC_CLI_GET_ARGC_INDEX("acl-key-use-arp-mac-sa");
    if(index != 0xFF)
    {
       CTC_CLI_GET_UINT8("acl-key-use-arp-mac-sa", acl_property.key_use_arp_sender_mac, argv[index+1]);
    }
    index = CTC_CLI_GET_ARGC_INDEX("acl-key-use-arp-mac-da");
    if(index != 0xFF)
    {
       CTC_CLI_GET_UINT8("acl-key-use-arp-mac-da", acl_property.key_use_arp_target_mac, argv[index+1]);
    }
    index = CTC_CLI_GET_ARGC_INDEX("acl-action-fid-en");
    if(index != 0xFF)
    {
        CTC_CLI_GET_UINT8("action-fid-en", acl_property.action_fid_en, argv[index+1]);
    }
    index = CTC_CLI_GET_ARGC_INDEX("action-pri");
    if(index != 0xFF)
    {
        CTC_CLI_GET_UINT8("action-pri", acl_property.action_pri, argv[index+1]);
    }
    index = CTC_CLI_GET_ARGC_INDEX("mac-ipv6-key-u0-mode");
    if(index != 0xFF)
    {
        CTC_CLI_GET_UINT8("mac-ipv6-key-u0-mode", acl_property.mac_ipv6_key_u0_mode, argv[index+1]);
    }
    index = CTC_CLI_GET_ARGC_INDEX("mac-ipv6-key-u1-mode");
    if(index != 0xFF)
    {
        CTC_CLI_GET_UINT8("mac-ipv6-key-u1-mode", acl_property.mac_ipv6_key_u1_mode, argv[index+1]);
    }
    index = CTC_CLI_GET_ARGC_INDEX("l2l3-key-u2-mode");
    if(index != 0xFF)
    {
        CTC_CLI_GET_UINT8("l2l3-key-u2-mode", acl_property.l2l3_key_u2_mode, argv[index+1]);
		acl_property.npm_im_en = 0;
    }
    index = CTC_CLI_GET_ARGC_INDEX("l2l3-key-u3-mode");
    if(index != 0xFF)
    {
        CTC_CLI_GET_UINT8("l2l3-key-u3-mode", acl_property.l2l3_key_u3_mode, argv[index+1]);
    }
    index = CTC_CLI_GET_ARGC_INDEX("eco-en");
    if(index != 0xFF)
    {
        CTC_CLI_GET_UINT8("eco-enable", acl_property.eco_en, argv[index+1]);
    }
    index = CTC_CLI_GET_ARGC_INDEX("oam-pkt-lkup-dis");
    if(index != 0xFF)
    {
        CTC_CLI_GET_UINT8("oam-pkt-lkup-dis", acl_property.oam_pkt_lkup_disable , argv[index+1]);
    }

    if(g_ctcs_api_en)
    {
        ret = ctcs_global_ctl_set(g_api_ldev, CTC_GLOBAL_ACL_PROPERTY, &acl_property);
    }
    else
    {
        ret = ctc_global_ctl_set(CTC_GLOBAL_ACL_PROPERTY, &acl_property);
    }

    if (ret < 0)
    {
        ctc_cli_out("%% ret = %d, %s \n", ret, ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;
}

CTC_CLI(ctc_cli_chip_get_global_acl_property,
        ctc_cli_chip_get_global_acl_property_cmd,
        "show chip global-cfg acl-property direction (ingress|egress) (priority VALUE |)" ,
        "Show",
        "Chip module",
        "Global config",
        "Acl property",
        "Direction",
        "Ingress",
        "Egress",
        "Priority",
        "ACL priority (ACL lookup level)")
{
    int32  ret = CLI_SUCCESS;
    uint8  index = 0;

	uint8  loop = 0;
	uint32 value = 0;

    ctc_global_acl_property_t acl_property;

    sal_memset(&acl_property,0,sizeof(ctc_global_acl_property_t));

    /*direction*/
    index = CTC_CLI_GET_ARGC_INDEX("ingress");
    if (INDEX_VALID(index))
    {
        acl_property.dir = CTC_INGRESS;
    }

    index = CTC_CLI_GET_ARGC_INDEX("egress");
    if (INDEX_VALID(index))
    {
        acl_property.dir = CTC_EGRESS;
    }

    index = CTC_CLI_GET_ARGC_INDEX("priority");
    if(index != 0xFF)
    {

       CTC_CLI_GET_UINT8("Acl priority", acl_property.lkup_level, argv[index+1]);

    }

    if(g_ctcs_api_en)
    {
        ret = ctcs_global_ctl_get(g_api_ldev, CTC_GLOBAL_ACL_PROPERTY, &acl_property);
    }
    else
    {
        ret = ctc_global_ctl_get(CTC_GLOBAL_ACL_PROPERTY, &acl_property);
    }

    if (ret < 0)
    {
        ctc_cli_out("%% ret = %d, %s \n", ret, ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("Show chip acl-property info\n");
    ctc_cli_out("==============================\n");
    ctc_cli_out("Direction: %s\n", acl_property.dir ?  "EGRESS" :"INGRESS" );
    ctc_cli_out("Acl_priority : %d\n", acl_property.lkup_level);
    ctc_cli_out("Discard pkt lkup en : %d\n", acl_property.discard_pkt_lkup_en);
    ctc_cli_out("Mpls im en : %u\n", acl_property.npm_im_en);
    ctc_cli_out("action fid en : %d\n", acl_property.action_fid_en);
    ctc_cli_out("action priority : %d\n", acl_property.action_pri);

    ctc_cli_out("Key ipv6 da addr mode : %d\n", acl_property.key_ipv6_da_addr_mode);
    ctc_cli_out("Key ipv6 sa addr mode : %d\n", acl_property.key_ipv6_sa_addr_mode);
    ctc_cli_out("Key cid en : %d\n", acl_property.key_cid_en);
    ctc_cli_out("Key cid mode: %d\n", acl_property.key_cid_mode);
    ctc_cli_out("Cid key ipv6 da addr mode : %d\n", acl_property.cid_key_ipv6_da_addr_mode);
    ctc_cli_out("Cid key ipv6 sa addr mode: %d\n", acl_property.cid_key_ipv6_sa_addr_mode);
    ctc_cli_out("Key ctag en : %d\n", acl_property.key_ctag_en);
    ctc_cli_out("l3-key use compress-address for ipv6 : %d\n", acl_property.l3_key_ipv6_use_compress_addr);
    ctc_cli_out("Stp blocked pkt lkup en : %d\n", acl_property.stp_blocked_pkt_lkup_en);
    ctc_cli_out("Random log mapped new acl priority : %d\n", acl_property.random_log_pri);
    ctc_cli_out("L2 Type as vlan num : %u\n", acl_property.l2_type_as_vlan_num);
    ctc_cli_out("Fwd ext key l2 header en : %u\n", acl_property.fwd_ext_key_l2_hdr_en);
    ctc_cli_out("Key stk hdr en : %u\n", acl_property.key_stk_hdr_en);
    ctc_cli_out("Glb acl presel en : %u\n", acl_property.glb_acl_presel_en);

    ctc_cli_out("Copp key use udf : %u\n", acl_property.copp_key_use_udf);
    ctc_cli_out("Copp ext key use udf : %u\n", acl_property.copp_ext_key_use_udf);
    value = 0;
    for(loop = 0;loop <MAX_CTC_PARSER_L3_TYPE;loop++ )
    {
        if(acl_property.copp_key_use_ext_mode[loop])
		{
		     	CTC_BIT_SET(value,loop);
		}
    }
    ctc_cli_out("copp-key use ext mode : 0x%x\n",value);

    value = 0;
    for(loop = 0;loop <MAX_CTC_PARSER_L3_TYPE;loop++ )
    {
        if(acl_property.l2l3_ext_key_use_l2l3_key[loop])
		{
		     	CTC_BIT_SET(value,loop);
		}

     }
     ctc_cli_out("l2l3-ext-key use l2l3-key : 0x%x\n",value);
     ctc_cli_out("stk-hdr-key-en : %u\n", acl_property.stk_hdr_lkup_en);
     ctc_cli_out("Copp key support fid : %u\n", acl_property.copp_key_fid_en);
     ctc_cli_out("fwd key support fid : %u\n", acl_property.fwd_key_fid_en);
     ctc_cli_out("l2l3 key support fid : %u\n", acl_property.l2l3_key_fid_en);
     ctc_cli_out("acl key use arp macsa : %u\n", acl_property.key_use_arp_sender_mac);
     ctc_cli_out("acl key use arp macda : %u\n", acl_property.key_use_arp_target_mac);

     ctc_cli_out("l2l3 key u2 mode : %u\n", acl_property.l2l3_key_u2_mode);
     ctc_cli_out("l2l3 key u3 mode  : %u\n", acl_property.l2l3_key_u3_mode);
     ctc_cli_out("mac ipv6 key u0 mode : %u\n", acl_property.mac_ipv6_key_u0_mode);
     ctc_cli_out("mac ipv6 key u1 mode  : %u\n", acl_property.mac_ipv6_key_u1_mode);
     ctc_cli_out("eco enable  : %u\n", acl_property.eco_en);
     ctc_cli_out("oam packet lkp disable  : %u\n", acl_property.oam_pkt_lkup_disable);

    ctc_cli_out("==============================\n");

    return ret;

}

CTC_CLI(ctc_cli_chip_global_scl_property,
        ctc_cli_chip_global_scl_property_cmd,
        "chip global-cfg scl-property direction (ingress|egress|both) (priority VALUE |) "\
        "{ipv6-single-mode MODE|key-ipv6-da-addr-mode VALUE |key-ipv6-sa-addr-mode VALUE | key-ipv6-da-addr-len VALUE}",
        "Chip module",
        "Global config",
        "Scl property",
        "Direction",
        "Ingress",
        "Egress",
        "Both",
        "Priority",
        "SCL priority (SCL lookup level)",
        "Ipv6 single mode when enable CTC_PORT_IGS_SCL_TCAM_TYPE_IP_SINGLE on port",
        "Mode",
        "Key ipv6 da addr mode when ipv6 single mode is 0",
        "Ipv6 address compress mode,refer to ctc_global_ipv6_addr_compress_mode_t",
        "Key ipv6 sa addr mode when ipv6 single mode is 0",
        "Ipv6 address compress mode,refer to ctc_global_ipv6_addr_compress_mode_t",
        "Key ipv6 da addr length when only use ipv6 da be scl key",
        "Ipv6 address mask length")
{
    int32  ret = CLI_SUCCESS;
    uint8  index = 0;
    ctc_global_scl_property_t scl_property;
    sal_memset(&scl_property,0,sizeof(ctc_global_scl_property_t));

    /*direction*/
    scl_property.dir = CTC_BOTH_DIRECTION;
    index = CTC_CLI_GET_ARGC_INDEX("ingress");
    if (INDEX_VALID(index))
    {
        scl_property.dir = CTC_INGRESS;
    }

    index = CTC_CLI_GET_ARGC_INDEX("egress");
    if (INDEX_VALID(index))
    {
        scl_property.dir = CTC_EGRESS;
    }

    index = CTC_CLI_GET_ARGC_INDEX("priority");
    if(index != 0xFF)
    {
       CTC_CLI_GET_UINT8("Priority", scl_property.lkup_level, argv[index+1]);
    }

    if(g_ctcs_api_en)
    {
        ret = ctcs_global_ctl_get(g_api_ldev, CTC_GLOBAL_SCL_PROPERTY, &scl_property);
    }
    else
    {
        ret = ctc_global_ctl_get(CTC_GLOBAL_SCL_PROPERTY, &scl_property);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    index = CTC_CLI_GET_ARGC_INDEX("ipv6-single-mode");
    if(index != 0xFF)
    {
       CTC_CLI_GET_UINT8("ipv6 single mode", scl_property.ipv6_single_mode, argv[index+1]);
    }


    index = CTC_CLI_GET_ARGC_INDEX("key-ipv6-da-addr-mode");
    if(index != 0xFF)
    {
       CTC_CLI_GET_UINT8("Key ipv6 da addr mode", scl_property.key_ipv6_da_addr_mode, argv[index+1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("key-ipv6-sa-addr-mode");
    if(index != 0xFF)
    {
       CTC_CLI_GET_UINT8("Key ipv6 sa addr mode", scl_property.key_ipv6_sa_addr_mode, argv[index+1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("key-ipv6-da-addr-len");
    if(index != 0xFF)
    {
       CTC_CLI_GET_UINT8("Key ipv6 da addr len", scl_property.key_ipv6_da_addr_len, argv[index+1]);
    }

    if(g_ctcs_api_en)
    {
        ret = ctcs_global_ctl_set(g_api_ldev, CTC_GLOBAL_SCL_PROPERTY, &scl_property);
    }
    else
    {
        ret = ctc_global_ctl_set(CTC_GLOBAL_SCL_PROPERTY, &scl_property);
    }

    if (ret < 0)
    {
        ctc_cli_out("%% ret = %d, %s \n", ret, ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;
}

CTC_CLI(ctc_cli_chip_get_global_scl_property,
        ctc_cli_chip_get_global_scl_property_cmd,
        "show chip global-cfg scl-property direction (ingress|egress) (priority VALUE |)" ,
        "Show",
        "Chip module",
        "Global config",
        "Scl property",
        "Direction",
        "Ingress",
        "Egress",
        "Priority",
        "SCL priority (SCL lookup level)")
{
    int32  ret = CLI_SUCCESS;
    uint8  index = 0;
    ctc_global_scl_property_t scl_property;

    sal_memset(&scl_property,0,sizeof(ctc_global_scl_property_t));

    /*direction*/
    index = CTC_CLI_GET_ARGC_INDEX("ingress");
    if (INDEX_VALID(index))
    {
        scl_property.dir = CTC_INGRESS;
    }

    index = CTC_CLI_GET_ARGC_INDEX("egress");
    if (INDEX_VALID(index))
    {
        scl_property.dir = CTC_EGRESS;
    }

    index = CTC_CLI_GET_ARGC_INDEX("priority");
    if(index != 0xFF)
    {

       CTC_CLI_GET_UINT8("Priority", scl_property.lkup_level, argv[index+1]);

    }

    if(g_ctcs_api_en)
    {
        ret = ctcs_global_ctl_get(g_api_ldev, CTC_GLOBAL_SCL_PROPERTY, &scl_property);
    }
    else
    {
        ret = ctc_global_ctl_get(CTC_GLOBAL_SCL_PROPERTY, &scl_property);
    }

    if (ret < 0)
    {
        ctc_cli_out("%% ret = %d, %s \n", ret, ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("Show chip scl-property info\n");
    ctc_cli_out("==============================\n");
    ctc_cli_out("Direction: %s\n", scl_property.dir ?  "EGRESS" :"INGRESS" );
    ctc_cli_out("Scl_priority          : %d\n", scl_property.lkup_level);
    ctc_cli_out("Ipv6 single mode      : %d\n", scl_property.ipv6_single_mode);
    ctc_cli_out("Key ipv6 da addr mode : %d\n", scl_property.key_ipv6_da_addr_mode);
    ctc_cli_out("Key ipv6 sa addr mode : %d\n", scl_property.key_ipv6_sa_addr_mode);
    ctc_cli_out("key ipv6 da addr len  : %d\n", scl_property.key_ipv6_da_addr_len);
    ctc_cli_out("==============================\n");

    return ret;

}


CTC_CLI(ctc_cli_chip_global_cid_property,
        ctc_cli_chip_global_cid_property_cmd,
        "chip global-cfg cid-property {global-cid CID|cid-pair-en|cmd-ethtype ETHTYPE|cmd-parser-en|cross-chip-cid-en|insert-cmd|\
        (reassign-cid-pri (dst-cid|) {default PRI|fwd-table PRI|flow-table PRI|global PRI|pkt PRI|interface PRI|iloop PRI})|\
        presel-cid CID_BMP|direction (ingress|egress)|}" ,
        "Chip module",
        "Global config",
        "CID property",
        "Global cid",
        "CID Value",
        "Enbale cid-pair function",
        "CMD EthType",
        "EthType",
        "Enable CMD Parser",
        "Cross-chip-cid enable",
        "Insert CMD Header to packet",
        "Reassign CID pipeline priority",
        "Select destination CID",
        "Default CID",
        "Priority",
        "Forward Table CID",
        "Priority",
        "Flow Table CID",
        "Priority",
        "Global CID",
        "Priority",
        "Packet CID",
        "Priority",
        "Interface CID",
        "Priority",
        "Iloop CID",
        "Priority",
        "Presel CID",
        "CID Bitmap",
        "Direction",
        "Ingress",
        "Egress")
{

    int32  ret = CLI_SUCCESS;

    uint8  index = 0;

    ctc_global_cid_property_t cid_property;
    sal_memset(&cid_property,0,sizeof(cid_property));

	index = CTC_CLI_GET_ARGC_INDEX("dst-cid");
    if (INDEX_VALID(index))
    {
	   cid_property.is_dst_cid= 1;
    }



    index = CTC_CLI_GET_ARGC_INDEX("global-cid");
    if (INDEX_VALID(index))
    {
       CTC_CLI_GET_UINT8("global-cid", cid_property.global_cid, argv[index+1]);
	   cid_property.global_cid_en = 1;
    }
	index = CTC_CLI_GET_ARGC_INDEX("cid-pair-en");
    if (INDEX_VALID(index))
    {
	   cid_property.cid_pair_en= 1;
    }
	index = CTC_CLI_GET_ARGC_INDEX("cmd-parser-en");
    if (INDEX_VALID(index))
    {
	   cid_property.cmd_parser_en= 1;
    }
	index = CTC_CLI_GET_ARGC_INDEX("cmd-ethtype");
    if (INDEX_VALID(index))
    {
       CTC_CLI_GET_UINT16("cmd-ethtype", cid_property.cmd_ethtype, argv[index+1]);
    }
	index = CTC_CLI_GET_ARGC_INDEX("insert-cmd");
    if (INDEX_VALID(index))
    {
      cid_property.insert_cid_hdr_en = 1;
    }
	index = CTC_CLI_GET_ARGC_INDEX("reassign-cid-pri");
    if (INDEX_VALID(index))
    {
	   cid_property.reassign_cid_pri_en = 1;
    }

	index = CTC_CLI_GET_ARGC_INDEX("default");
    if (INDEX_VALID(index))
    {
       CTC_CLI_GET_UINT8("default priority", cid_property.default_cid_pri, argv[index+1]);
    }
	index = CTC_CLI_GET_ARGC_INDEX("fwd-table");
    if (INDEX_VALID(index))
    {
       CTC_CLI_GET_UINT8("fwd-table priority", cid_property.fwd_table_cid_pri, argv[index+1]);
    }
	index = CTC_CLI_GET_ARGC_INDEX("flow-table");
    if (INDEX_VALID(index))
    {
       CTC_CLI_GET_UINT8("flow-table priority", cid_property.flow_table_cid_pri, argv[index+1]);
    }
	index = CTC_CLI_GET_ARGC_INDEX("global");
    if (INDEX_VALID(index))
    {
       CTC_CLI_GET_UINT8("global priority", cid_property.global_cid_pri, argv[index+1]);
    }
	index = CTC_CLI_GET_ARGC_INDEX("pkt");
    if (INDEX_VALID(index))
    {
       CTC_CLI_GET_UINT8("pkt priority", cid_property.pkt_cid_pri, argv[index+1]);
    }
	index = CTC_CLI_GET_ARGC_INDEX("interface");
    if (INDEX_VALID(index))
    {
       CTC_CLI_GET_UINT8("interface priority", cid_property.if_cid_pri, argv[index+1]);
    }
	index = CTC_CLI_GET_ARGC_INDEX("iloop");
    if (INDEX_VALID(index))
    {
       CTC_CLI_GET_UINT8("iloop priority", cid_property.iloop_cid_pri, argv[index+1]);
    }
	index = CTC_CLI_GET_ARGC_INDEX("cross-chip-cid-en");
    if (INDEX_VALID(index))
    {
	   cid_property.cross_chip_cid_en= 1;
    }
    index = CTC_CLI_GET_ARGC_INDEX("presel-cid");
    if (INDEX_VALID(index))
    {
        CTC_CLI_GET_UINT32("iloop priority", cid_property.presel_cid_bitmap, argv[index+1]);
    }
    index = CTC_CLI_GET_ARGC_INDEX("egress");
    if (INDEX_VALID(index))
    {
        cid_property.dir = CTC_EGRESS;
    }
    if(g_ctcs_api_en)
    {
        ret = ctcs_global_ctl_set(g_api_ldev, CTC_GLOBAL_CID_PROPERTY, &cid_property);
    }
    else
    {
        ret = ctc_global_ctl_set(CTC_GLOBAL_CID_PROPERTY, &cid_property);
    }

    if (ret < 0)
    {
        ctc_cli_out("%% ret = %d, %s \n", ret, ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;
}

CTC_CLI(ctc_cli_chip_get_global_cid_property,
        ctc_cli_chip_get_global_cid_property_cmd,
        "show chip global-cfg cid-property {dst-cid|direction (ingress|egress)|}" ,
        "Show",
        "Chip module",
        "Global config",
        "CID property",
        "Select destination CID",
        "Direction",
        "Ingress",
        "Egress")
{
    int32  ret = CLI_SUCCESS;
    uint8  index = 0;
    ctc_global_cid_property_t cid_property;

    sal_memset(&cid_property,0,sizeof(ctc_global_cid_property_t));

    index = CTC_CLI_GET_ARGC_INDEX("dst-cid");
    if (INDEX_VALID(index))
    {

       cid_property.is_dst_cid = 1;

    }
    index = CTC_CLI_GET_ARGC_INDEX("egress");
    if (INDEX_VALID(index))
    {
       cid_property.dir = CTC_EGRESS;
    }
    if(g_ctcs_api_en)
    {
        ret = ctcs_global_ctl_get(g_api_ldev, CTC_GLOBAL_CID_PROPERTY, &cid_property);
    }
    else
    {
        ret = ctc_global_ctl_get(CTC_GLOBAL_CID_PROPERTY, &cid_property);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% ret = %d, %s \n", ret, ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("global_cid          : %d\n",cid_property.global_cid);
    ctc_cli_out("global_cid_en       : %d\n",cid_property.global_cid_en);
    ctc_cli_out("cid_pair_en         : %d\n",cid_property.cid_pair_en);
    ctc_cli_out("cmd_parser_en       : %d\n",cid_property.cmd_parser_en);
    ctc_cli_out("cmd_ethtype         : 0x%x\n",cid_property.cmd_ethtype);
	ctc_cli_out("insert CMD Header   : %d\n",cid_property.insert_cid_hdr_en);
    ctc_cli_out("is_dst_cid          : %d\n",cid_property.is_dst_cid );
	ctc_cli_out("cross chip cid en   : %d\n",cid_property.cross_chip_cid_en);
    ctc_cli_out("presel_cid          : 0x%x\n",cid_property.presel_cid_bitmap);
	if(!cid_property.is_dst_cid)
	{
   	   ctc_cli_out("pkt_cid_pri         : %d\n",cid_property.pkt_cid_pri);
   	   ctc_cli_out("iloop_cid_pri       : %d\n",cid_property.iloop_cid_pri);
       ctc_cli_out("global_cid_pri      : %d\n",cid_property.global_cid_pri);
       ctc_cli_out("flow_table_cid_pri  : %d\n",cid_property.flow_table_cid_pri);
       ctc_cli_out("fwd_table_cid_pri   : %d\n",cid_property.fwd_table_cid_pri);
       ctc_cli_out("if_cid_pri          : %d\n",cid_property.if_cid_pri);
       ctc_cli_out("default_cid_pri     : %d\n",cid_property.default_cid_pri);
	}
	else
	{
  	   ctc_cli_out("fwd_table_cid_pri   : %d\n",cid_property.fwd_table_cid_pri);
       ctc_cli_out("flow_table_cid_pri  : %d\n",cid_property.flow_table_cid_pri);
       ctc_cli_out("default_cid_pri     : %d\n",cid_property.default_cid_pri);
	}




    return ret;

}

CTC_CLI(ctc_cli_chip_get_global_capability,
        ctc_cli_chip_get_global_capability_cmd,
        "show chip global-cfg chip-capability",
        "Show",
        "Chip module",
        "Global config",
        "Chip capability")
{
    int32 ret = CLI_SUCCESS;
    uint8 type = 0;
    uint32 capability[CTC_GLOBAL_CAPABILITY_MAX] = {0};

    type = CTC_GLOBAL_CHIP_CAPABILITY;

    if(g_ctcs_api_en)
    {
         ret = ctcs_global_ctl_get(g_api_ldev, type, capability);
    }
    else
    {
        ret = ctc_global_ctl_get(type, capability);
    }

    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("Show chip capability info\n");
    ctc_cli_out("======================================\n");

    PRINT_CAPABLITY(MAX_LCHIP_NUM);
    PRINT_CAPABLITY(MAX_PHY_PORT_NUM);
    PRINT_CAPABLITY(MAX_PORT_NUM);
    PRINT_CAPABLITY(MAX_CHIP_NUM);
    PRINT_CAPABLITY(PKT_HDR_LEN);
    PRINT_CAPABLITY(LOGIC_PORT_NUM);
    PRINT_CAPABLITY(MAX_FID);
    PRINT_CAPABLITY(MAX_VRFID);
    PRINT_CAPABLITY(MAX_ACL_LOG_ID);
    PRINT_CAPABLITY(MAX_EACL_LOG_ID);
    PRINT_CAPABLITY(MCAST_GROUP_NUM);
    PRINT_CAPABLITY(VLAN_NUM);
    PRINT_CAPABLITY(VLAN_RANGE_GROUP_NUM);
    PRINT_CAPABLITY(STP_INSTANCE_NUM);
    PRINT_CAPABLITY(LINKAGG_GROUP_NUM);
    PRINT_CAPABLITY(LINKAGG_MEMBER_NUM);
    PRINT_CAPABLITY(LINKAGG_DLB_FLOW_NUM);
    PRINT_CAPABLITY(LINKAGG_DLB_MEMBER_NUM);
    PRINT_CAPABLITY(LINKAGG_DLB_GROUP_NUM);
    PRINT_CAPABLITY(ECMP_GROUP_NUM);
    PRINT_CAPABLITY(ECMP_MEMBER_NUM);
    PRINT_CAPABLITY(ECMP_DLB_FLOW_NUM);
    PRINT_CAPABLITY(EXTERNAL_NEXTHOP_NUM);
    PRINT_CAPABLITY(GLOBAL_DSNH_NUM);
    PRINT_CAPABLITY(MPLS_TUNNEL_NUM);
    PRINT_CAPABLITY(ARP_ID_NUM);
    PRINT_CAPABLITY(L3IF_NUM);
    PRINT_CAPABLITY(OAM_SESSION_NUM);
    PRINT_CAPABLITY(NPM_SESSION_NUM);
    PRINT_CAPABLITY(APS_GROUP_NUM);
    PRINT_CAPABLITY(TOTAL_POLICER_NUM);
    PRINT_CAPABLITY(POLICER_NUM);
    ctc_cli_out("---------------------------------------\n");
    PRINT_CAPABLITY(TOTAL_STATS_NUM);
    PRINT_CAPABLITY(QUEUE_STATS_NUM);
    PRINT_CAPABLITY(POLICER_STATS_NUM);
    PRINT_CAPABLITY(SHARE1_STATS_NUM);
    PRINT_CAPABLITY(SHARE2_STATS_NUM);
    PRINT_CAPABLITY(SHARE3_STATS_NUM);
    PRINT_CAPABLITY(SHARE4_STATS_NUM);

#if defined(TSINGMA_MX) || defined(TSINGMA_GX) || defined(ARCTIC)
    PRINT_CAPABLITY(SHARE5_STATS_NUM);
    PRINT_CAPABLITY(SHARE6_STATS_NUM);
    PRINT_CAPABLITY(SHARE7_STATS_NUM);
    PRINT_CAPABLITY(SHARE8_STATS_NUM);
#endif
#if defined(ARCTIC)
    PRINT_CAPABLITY(SHARE9_STATS_NUM);
    PRINT_CAPABLITY(SHARE10_STATS_NUM);
    PRINT_CAPABLITY(SHARE11_STATS_NUM);
    PRINT_CAPABLITY(SHARE12_STATS_NUM);
    PRINT_CAPABLITY(SHARE13_STATS_NUM);
    PRINT_CAPABLITY(SHARE14_STATS_NUM);
    PRINT_CAPABLITY(SHARE15_STATS_NUM);
    PRINT_CAPABLITY(SHARE16_STATS_NUM);
#endif
    PRINT_CAPABLITY(ACL0_IGS_STATS_NUM);
    PRINT_CAPABLITY(ACL1_IGS_STATS_NUM);
    PRINT_CAPABLITY(ACL2_IGS_STATS_NUM);
    PRINT_CAPABLITY(ACL3_IGS_STATS_NUM);

#if defined(TSINGMA_MX) || defined(TSINGMA_GX) || defined(ARCTIC)
    PRINT_CAPABLITY(ACL4_IGS_STATS_NUM);
    PRINT_CAPABLITY(ACL5_IGS_STATS_NUM);
    PRINT_CAPABLITY(ACL6_IGS_STATS_NUM);
    PRINT_CAPABLITY(ACL7_IGS_STATS_NUM);
    PRINT_CAPABLITY(ACL8_IGS_STATS_NUM);
    PRINT_CAPABLITY(ACL9_IGS_STATS_NUM);
    PRINT_CAPABLITY(ACL10_IGS_STATS_NUM);
    PRINT_CAPABLITY(ACL11_IGS_STATS_NUM);
    PRINT_CAPABLITY(ACL12_IGS_STATS_NUM);
    PRINT_CAPABLITY(ACL13_IGS_STATS_NUM);
    PRINT_CAPABLITY(ACL14_IGS_STATS_NUM);
    PRINT_CAPABLITY(ACL15_IGS_STATS_NUM);
#endif
#if defined(ARCTIC)
    PRINT_CAPABLITY(ACL16_IGS_STATS_NUM);
    PRINT_CAPABLITY(ACL17_IGS_STATS_NUM);
    PRINT_CAPABLITY(ACL18_IGS_STATS_NUM);
    PRINT_CAPABLITY(ACL19_IGS_STATS_NUM);
    PRINT_CAPABLITY(ACL20_IGS_STATS_NUM);
    PRINT_CAPABLITY(ACL21_IGS_STATS_NUM);
    PRINT_CAPABLITY(ACL22_IGS_STATS_NUM);
    PRINT_CAPABLITY(ACL23_IGS_STATS_NUM);
#endif
    PRINT_CAPABLITY(ACL0_EGS_STATS_NUM);

#if defined(TSINGMA_MX) || defined(TSINGMA_GX) || defined(ARCTIC)
    PRINT_CAPABLITY(ACL1_EGS_STATS_NUM);
    PRINT_CAPABLITY(ACL2_EGS_STATS_NUM);
    PRINT_CAPABLITY(ACL3_EGS_STATS_NUM);
#endif
#if defined(ARCTIC)
    PRINT_CAPABLITY(ACL4_EGS_STATS_NUM);
    PRINT_CAPABLITY(ACL5_EGS_STATS_NUM);
    PRINT_CAPABLITY(ACL6_EGS_STATS_NUM);
    PRINT_CAPABLITY(ACL7_EGS_STATS_NUM);
    PRINT_CAPABLITY(ACL8_EGS_STATS_NUM);
    PRINT_CAPABLITY(ACL9_EGS_STATS_NUM);
    PRINT_CAPABLITY(ACL10_EGS_STATS_NUM);
    PRINT_CAPABLITY(ACL11_EGS_STATS_NUM);
#endif
    PRINT_CAPABLITY(ECMP_STATS_NUM);
    ctc_cli_out("---------------------------------------\n");
    PRINT_CAPABLITY(ROUTE_MAC_ENTRY_NUM);
    PRINT_CAPABLITY(MAC_ENTRY_NUM);
    PRINT_CAPABLITY(BLACK_HOLE_ENTRY_NUM);
    PRINT_CAPABLITY(HOST_ROUTE_ENTRY_NUM);
    PRINT_CAPABLITY(LPM_ROUTE_ENTRY_NUM);
    PRINT_CAPABLITY(IPMC_ENTRY_NUM);
    PRINT_CAPABLITY(MPLS_ENTRY_NUM);
    PRINT_CAPABLITY(TUNNEL_ENTRY_NUM);
    PRINT_CAPABLITY(IPFIX_ENTRY_NUM);
    PRINT_CAPABLITY(EFD_FLOW_ENTRY_NUM);
    ctc_cli_out("---------------------------------------\n");
    PRINT_CAPABLITY(L2PDU_L2HDR_PROTO_ENTRY_NUM);
    PRINT_CAPABLITY(L2PDU_MACDA_ENTRY_NUM);
    PRINT_CAPABLITY(L2PDU_MACDA_LOW24_ENTRY_NUM);
    PRINT_CAPABLITY(L2PDU_L2CP_MAX_ACTION_INDEX);
    PRINT_CAPABLITY(L3PDU_L3HDR_PROTO_ENTRY_NUM);
    PRINT_CAPABLITY(L3PDU_L4PORT_ENTRY_NUM);
    PRINT_CAPABLITY(L3PDU_IPDA_ENTRY_NUM);
    PRINT_CAPABLITY(L3PDU_MAX_ACTION_INDEX);
    ctc_cli_out("---------------------------------------\n");
    PRINT_CAPABLITY(SCL_HASH_ENTRY_NUM);
    PRINT_CAPABLITY(SCL1_HASH_ENTRY_NUM);
    PRINT_CAPABLITY(SCL_TCAM_ENTRY_NUM);
    PRINT_CAPABLITY(SCL1_TCAM_ENTRY_NUM);
    PRINT_CAPABLITY(SCL2_TCAM_ENTRY_NUM);
    PRINT_CAPABLITY(SCL3_TCAM_ENTRY_NUM);
    PRINT_CAPABLITY(ACL_HASH_ENTRY_NUM);
    PRINT_CAPABLITY(ACL0_IGS_TCAM_ENTRY_NUM);
    PRINT_CAPABLITY(ACL1_IGS_TCAM_ENTRY_NUM);
    PRINT_CAPABLITY(ACL2_IGS_TCAM_ENTRY_NUM);
    PRINT_CAPABLITY(ACL3_IGS_TCAM_ENTRY_NUM);
    PRINT_CAPABLITY(ACL4_IGS_TCAM_ENTRY_NUM);
    PRINT_CAPABLITY(ACL5_IGS_TCAM_ENTRY_NUM);
    PRINT_CAPABLITY(ACL6_IGS_TCAM_ENTRY_NUM);
    PRINT_CAPABLITY(ACL7_IGS_TCAM_ENTRY_NUM);

#if defined(TSINGMA_MX) || defined(TSINGMA_GX) || defined(ARCTIC)
    PRINT_CAPABLITY(ACL8_IGS_TCAM_ENTRY_NUM);
    PRINT_CAPABLITY(ACL9_IGS_TCAM_ENTRY_NUM);
    PRINT_CAPABLITY(ACL10_IGS_TCAM_ENTRY_NUM);
    PRINT_CAPABLITY(ACL11_IGS_TCAM_ENTRY_NUM);
    PRINT_CAPABLITY(ACL12_IGS_TCAM_ENTRY_NUM);
    PRINT_CAPABLITY(ACL13_IGS_TCAM_ENTRY_NUM);
    PRINT_CAPABLITY(ACL14_IGS_TCAM_ENTRY_NUM);
    PRINT_CAPABLITY(ACL15_IGS_TCAM_ENTRY_NUM);
#endif
#if defined(ARCTIC)
    PRINT_CAPABLITY(ACL16_IGS_TCAM_ENTRY_NUM);
    PRINT_CAPABLITY(ACL17_IGS_TCAM_ENTRY_NUM);
    PRINT_CAPABLITY(ACL18_IGS_TCAM_ENTRY_NUM);
    PRINT_CAPABLITY(ACL19_IGS_TCAM_ENTRY_NUM);
    PRINT_CAPABLITY(ACL20_IGS_TCAM_ENTRY_NUM);
    PRINT_CAPABLITY(ACL21_IGS_TCAM_ENTRY_NUM);
    PRINT_CAPABLITY(ACL22_IGS_TCAM_ENTRY_NUM);
    PRINT_CAPABLITY(ACL23_IGS_TCAM_ENTRY_NUM);
#endif
    PRINT_CAPABLITY(ACL0_EGS_TCAM_ENTRY_NUM);
    PRINT_CAPABLITY(ACL1_EGS_TCAM_ENTRY_NUM);
    PRINT_CAPABLITY(ACL2_EGS_TCAM_ENTRY_NUM);
#if defined(TSINGMA_MX) || defined(TSINGMA_GX)
    PRINT_CAPABLITY(ACL3_EGS_TCAM_ENTRY_NUM);
#endif
#if defined(ARCTIC)
     PRINT_CAPABLITY(ACL3_EGS_TCAM_ENTRY_NUM);
     PRINT_CAPABLITY(ACL4_EGS_TCAM_ENTRY_NUM);
     PRINT_CAPABLITY(ACL5_EGS_TCAM_ENTRY_NUM);
     PRINT_CAPABLITY(ACL6_EGS_TCAM_ENTRY_NUM);
     PRINT_CAPABLITY(ACL7_EGS_TCAM_ENTRY_NUM);
     PRINT_CAPABLITY(ACL8_EGS_TCAM_ENTRY_NUM);
     PRINT_CAPABLITY(ACL9_EGS_TCAM_ENTRY_NUM);
     PRINT_CAPABLITY(ACL10_EGS_TCAM_ENTRY_NUM);
     PRINT_CAPABLITY(ACL11_EGS_TCAM_ENTRY_NUM);
#endif
    PRINT_CAPABLITY(CID_PAIR_NUM);
    PRINT_CAPABLITY(UDF_ENTRY_NUM);
    PRINT_CAPABLITY(DOT1AE_SC_NUM);

    ctc_cli_out("======================================\n");

    return ret;
}

CTC_CLI(ctc_cli_chip_global_log_shift,
        ctc_cli_chip_global_log_shift_cmd,
        "chip global-cfg (igs-random-log-shift | egs-random-log-shift | eco-mode) value VALUE",
        "Chip module",
        "Global config",
        "Ingress random log shift",
        "Egress random log shift",
        "Energy conservation mode",
        "Value",
        "Value")
{
    int32 ret       = CLI_SUCCESS;
    uint32 val = 0;
    uint8 type = 0;
    uint8 index = 0;


    index = CTC_CLI_GET_ARGC_INDEX("igs-random-log-shift");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_IGS_RANDOM_LOG_SHIFT;
    }

    index = CTC_CLI_GET_ARGC_INDEX("egs-random-log-shift");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_EGS_RANDOM_LOG_SHIFT;
    }

    index = CTC_CLI_GET_ARGC_INDEX("eco-mode");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_ECO_EN;
    }

    CTC_CLI_GET_UINT32_RANGE("value", val, argv[1], 0, CTC_MAX_UINT32_VALUE);

    if(g_ctcs_api_en)
    {
         ret = ctcs_global_ctl_set(g_api_ldev, type, &val);
    }
    else
    {
        ret = ctc_global_ctl_set(type, &val);
    }

    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;

}

CTC_CLI(ctc_cli_chip_get_global_log_shift,
        ctc_cli_chip_get_global_log_shift_cmd,
        "show chip global-cfg (igs-random-log-shift | egs-random-log-shift | eco-mode)",
        "Show",
        "Chip module",
        "Global config",
        "Ingress random log shift",
        "Egress random log shift",
        "Energy conservation mode"
        )
{
    int32 ret       = CLI_SUCCESS;
    uint32 val = 0;
    uint8 type = 0;
    uint8 index = 0;
    char string[25] = {0};


    index = CTC_CLI_GET_ARGC_INDEX("igs-random-log-shift");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_IGS_RANDOM_LOG_SHIFT;
        sal_strcpy(string, "igs-random-log-shift");
    }

    index = CTC_CLI_GET_ARGC_INDEX("egs-random-log-shift");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_EGS_RANDOM_LOG_SHIFT;
        sal_strcpy(string, "egs-random-log-shift");
    }

    index = CTC_CLI_GET_ARGC_INDEX("eco-mode");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_ECO_EN;
        sal_strcpy(string, "eco-mode(bmp)");
    }

    if(g_ctcs_api_en)
    {
         ret = ctcs_global_ctl_get(g_api_ldev, type, &val);
    }
    else
    {
        ret = ctc_global_ctl_get(type, &val);
    }

    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("Show chip %-20s info:\n", string);
    ctc_cli_out("==================================\n");
    (CTC_GLOBAL_ECO_EN == type) ? ctc_cli_out("value:0x%x\n", val) : ctc_cli_out("value:%d\n", val);
    ctc_cli_out("==================================\n");

    return ret;

}

CTC_CLI(ctc_cli_chip_global_set_truncation_profile,
        ctc_cli_chip_global_set_truncation_profile_cmd,
        "chip global-cfg truncation-profile PROFILE_ID length LENGTH",
        "Chip module",
        "Global config",
        "Truncation profile",
        "Table DsTruncationProfile index",
        "Length",
        "Length value")
{
    int32 ret = CLI_SUCCESS;
    ctc_truncation_len_t truncation_len;
    sal_memset(&truncation_len,0,sizeof(ctc_truncation_len_t));

    CTC_CLI_GET_UINT8_RANGE("profile_id", truncation_len.profile_id, argv[0], 0, CTC_MAX_UINT8_VALUE);
    CTC_CLI_GET_UINT16_RANGE("truncated_len", truncation_len.truncated_len, argv[1], 0, CTC_MAX_UINT16_VALUE);

    if(g_ctcs_api_en)
    {
         ret = ctcs_global_ctl_set(g_api_ldev, CTC_GLOBAL_TRUNCATION_LEN_PROFILE, &truncation_len);
    }
    else
    {
        ret = ctc_global_ctl_set(CTC_GLOBAL_TRUNCATION_LEN_PROFILE, &truncation_len);
    }

    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;

}

CTC_CLI(ctc_cli_chip_global_get_truncation_profile,
        ctc_cli_chip_global_get_truncation_profile_cmd,
        "show chip global-cfg truncation-profile PROFILE_ID",
        "Show",
        "Chip module",
        "Global config",
        "Truncation profile",
        "Table DsTruncationProfile index")
{
    int32 ret = CLI_SUCCESS;
    ctc_truncation_len_t truncation_len;
    sal_memset(&truncation_len,0,sizeof(ctc_truncation_len_t));

    CTC_CLI_GET_UINT8_RANGE("profile_id", truncation_len.profile_id, argv[0], 0, CTC_MAX_UINT8_VALUE);

    if(g_ctcs_api_en)
    {
         ret = ctcs_global_ctl_get(g_api_ldev, CTC_GLOBAL_TRUNCATION_LEN_PROFILE, &truncation_len);
    }
    else
    {
        ret = ctc_global_ctl_get(CTC_GLOBAL_TRUNCATION_LEN_PROFILE, &truncation_len);
    }

    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("profile_id          : %d\n",truncation_len.profile_id);
    ctc_cli_out("truncated_len       : %d\n",truncation_len.truncated_len);

    return ret;

}

CTC_CLI(ctc_cli_chip_global_warmboot_timer,
        ctc_cli_chip_global_warmboot_timer_cmd,
        "chip global-cfg wb-timer (enable value VALUE | disable) ",
        "Chip module",
        "Global config",
        "Set warmboot timer",
        "Enable",
        "Timer interval",
        "Value",
        "Disable"
        )
{
    int32 ret       = CLI_SUCCESS;
    uint8 type = 0;
    uint8 index = 0;
    uint32 interval;

    index = CTC_CLI_GET_ARGC_INDEX("enable");
    if (INDEX_VALID(index))
    {
        CTC_CLI_GET_UINT32("interval", interval, argv[index+2]);
    }
    else
    {
        interval = 0;
    }

    type = CTC_GLOBAL_WARMBOOT_INTERVAL;

    if(g_ctcs_api_en)
    {
         ret = ctcs_global_ctl_set(g_api_ldev, type, &interval);
    }
    else
    {
        ret = ctc_global_ctl_set(type, &interval);
    }

    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;
}


CTC_CLI(ctc_cli_chip_get_global_warmboot_timer,
        ctc_cli_chip_get_global_warmboot_timer_cmd,
        "show chip global-cfg wb-timer",
        "Show",
        "Chip module",
        "Global config",
        "Warmboot timer")
{
    int32 ret       = CLI_SUCCESS;
    uint32 wb_interval;
    uint8 type = 0;
    type = CTC_GLOBAL_WARMBOOT_INTERVAL;

    if(g_ctcs_api_en)
    {
         ret = ctcs_global_ctl_get(g_api_ldev, type, &wb_interval);
    }
    else
    {
        ret = ctc_global_ctl_get(type, &wb_interval);
    }

    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }


    ctc_cli_out("Show chip wb-timer info:\n");
    ctc_cli_out("==================================\n");
    ctc_cli_out("time:%s, interval:%u\n", (wb_interval ? "enable":"disable"),wb_interval);
    ctc_cli_out("==================================\n");

    return ret;

}



CTC_CLI(ctc_cli_chip_global_config,
        ctc_cli_chip_global_config_cmd,
        "chip global-cfg (pim-snooping-mode | vxlan-udp-dest-port | geneve-udp-dest-port|igmp-snooping-mode|tpoam-vpws-coexist\
                         |arp-derive-mode|vxlan-crypt-udp-dest-port|dot1ae-crypt-ctcsh-udp-dest-port|dot1ae-crypt-ip-protocol|dot1ae-crypt-ip-protocol-with-ctcsh\
                         |vxlan-policer-gid-base|hmac-en|eslabel-en|im-en|switch-id|sid-edit-mode|force-stk-parser\
                         |mac-limit-mode|mpls-im-color-hw-en|max-ipv4-icmp-size|max-ipv6-icmp-size|min-tcp-hdr-size|\
                         macda-hit-aging-en|loop-mode|decaped-force-ipmc|logic-port-isolate-en|logic-rep-threshold|station-move-mode| truncation-mode | truncation-length)\
                         value VALUE {ip-protocol PROTOCOL |ip-header-mask MASK| }",
        "Chip module",
        "Global config",
        "PIM snooping mode",
        "Vxlan udp dest port",
        "Geneve udp dest port",
        "IGMP Snooping mode",
        "TP OAM and VPWS OAM can coexist",
        "ARP derive mode",
        "Vxlan crypt udp dest port",
        "Dot1ae crypt udp dest port",
        "Dot1ae crypt ip protocol",
        "Dot1ae crypt ip protocol with centec security header",
        "Vxlan policer group id base",
        "HMAC enable",
        "EsLabel enable",
        "IM enable",
        "Used for egress acl action switch id",
        "SID edit mode",
        "Force stacking parser",
        "Mac limit mode",
        "Mpls IM color by hardware",
        "Max IPv4 ICMP size",
        "Max IPv6 ICMP size",
        "Min TCP header size",
        "Macda hit aging en",
        "Loop mode",
        "Force ipmc lookup after tunnel decap",
        "Logic port isolate enable",
        "Logic replicate threshold",
        "Station move mode",
        "Truncation mode",
        "Truncation length",
        "Value",
        "VALUE",
        "IP Protocol", 
        "Protocol",
        "IP Header Mask", 
        "Mask")
{
    int32 ret = CLI_SUCCESS;
    uint8 loop = 0;
    uint8 type = 0;
    uint8 index = 0;
    uint32 val = 0;
    void* value = &val;
    ctc_global_hmac_t hmac;

    sal_memset(&hmac, 0, sizeof(ctc_global_hmac_t));
    index = CTC_CLI_GET_ARGC_INDEX("pim-snooping-mode");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_PIM_SNOOPING_MODE;
    }

    index = CTC_CLI_GET_ARGC_INDEX("vxlan-udp-dest-port");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_VXLAN_UDP_DEST_PORT;
    }

    index = CTC_CLI_GET_ARGC_INDEX("geneve-udp-dest-port");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_GENEVE_UDP_DEST_PORT;
    }
    index = CTC_CLI_GET_ARGC_INDEX("igmp-snooping-mode");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_IGMP_SNOOPING_MODE;
    }
    index = CTC_CLI_GET_ARGC_INDEX("tpoam-vpws-coexist");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_TPOAM_VPWSOAM_COEXIST;
    }
    index = CTC_CLI_GET_ARGC_INDEX("arp-derive-mode");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_NH_ARP_MACDA_DERIVE_MODE;
    }

    index = CTC_CLI_GET_ARGC_INDEX("vxlan-crypt-udp-dest-port");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_VXLAN_CRYPT_UDP_DEST_PORT;
    }
    index = CTC_CLI_GET_ARGC_INDEX("dot1ae-crypt-ctcsh-udp-dest-port");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_DOT1AE_CRYPT_CTCSH_UDP_DEST_PORT;
    }
    index = CTC_CLI_GET_ARGC_INDEX("dot1ae-crypt-ip-protocol");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_DOT1AE_CRYPT_IP_PROTOCOL;
    }
    index = CTC_CLI_GET_ARGC_INDEX("dot1ae-crypt-ip-protocol-with-ctcsh");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_DOT1AE_CRYPT_CTCSH_IP_PROTOCOL;
    }

    index = CTC_CLI_GET_ARGC_INDEX("vxlan-policer-gid-base");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_VXLAN_POLICER_GROUP_ID_BASE;
    }

    index = CTC_CLI_GET_ARGC_INDEX("hmac-en");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_HMAC_EN;
        value = (void*)&hmac;
    }

    index = CTC_CLI_GET_ARGC_INDEX("eslabel-en");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_ESLB_EN;
    }

    index = CTC_CLI_GET_ARGC_INDEX("im-en");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_NPM_IM_EN;
    }

    index = CTC_CLI_GET_ARGC_INDEX("switch-id");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_EACL_SWITCH_ID;
    }

    index = CTC_CLI_GET_ARGC_INDEX("sid-edit-mode");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_SID_EDIT_MODE;
    }
    index = CTC_CLI_GET_ARGC_INDEX("force-stk-parser");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_FORCE_STK_PARSER;
    }
    index = CTC_CLI_GET_ARGC_INDEX("mac-limit-mode");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_MAC_LIMIT_MODE;
    }
    index = CTC_CLI_GET_ARGC_INDEX("mpls-im-color-hw-en");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_NPM_IM_COLOR_HW_EN;
    }
    if (0xFF != (index = CTC_CLI_GET_ARGC_INDEX("max-ipv4-icmp-size")))
    {
        type = CTC_GLOBAL_MAX_IPV4_ICMP_PKT_SIZE;
    }
    else if (0xFF != (index = CTC_CLI_GET_ARGC_INDEX("max-ipv6-icmp-size")))
    {
        type = CTC_GLOBAL_MAX_IPV6_ICMP_PKT_SIZE;
    }
    else if (0xFF != (index = CTC_CLI_GET_ARGC_INDEX("min-tcp-hdr-size")))
    {
        type = CTC_GLOBAL_MIN_TCP_HDR_SIZE;
    }
    index = CTC_CLI_GET_ARGC_INDEX("macda-hit-aging-en");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_MACDA_HIT_AGING_EN;
    }
    index = CTC_CLI_GET_ARGC_INDEX("loop-mode");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_LOOP_MODE;
    }
    index = CTC_CLI_GET_ARGC_INDEX("decaped-force-ipmc");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_DECAPED_FORCE_IPMC;
    }
    index = CTC_CLI_GET_ARGC_INDEX("logic-port-isolate-en");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_LOGIC_PORT_ISOLATE_EN;
    }

    index = CTC_CLI_GET_ARGC_INDEX("logic-rep-threshold");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_MCAST_LOGIC_REP_THRD;
    }

    index = CTC_CLI_GET_ARGC_INDEX("station-move-mode");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_STATION_MOVE_MODE;
    }

    index = CTC_CLI_GET_ARGC_INDEX("truncation-mode");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_TRUNCATION_MODE;
    }
    index = CTC_CLI_GET_ARGC_INDEX("truncation-length");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_TRUNCATION_LEN;
    }
    CTC_CLI_GET_UINT32_RANGE("value", val, argv[1], 0, CTC_MAX_UINT32_VALUE);

    if (type == CTC_GLOBAL_HMAC_EN && val != 0)
    {
        hmac.enable = 1;
        hmac.ip_protocol_en = 0;
        index = CTC_CLI_GET_ARGC_INDEX("ip-protocol");
        if (INDEX_VALID(index))
        {
            hmac.ip_protocol_en = 1;
            CTC_CLI_GET_UINT32("ip-protocol", hmac.ip_protocol, argv[index+1]);
        }
        index = CTC_CLI_GET_ARGC_INDEX("ip-header-mask");
        if (INDEX_VALID(index))
        {
            if (sal_strlen(argv[index+1]) != CTC_IP_HEADER_LEN*2)
            {
                ctc_cli_out("hmac ip header len error\n");
                return CLI_ERROR;
            }
            for (loop = 0; loop < CTC_IP_HEADER_LEN; loop++)
            {
                sal_sscanf(argv[index+1] + 2*loop, "%2hhx", &hmac.ip_header_mask[loop]);
            }
        }
        else
        {
            sal_memset(hmac.ip_header_mask, 0xFF, CTC_IP_HEADER_LEN);
        }
    }

    if(g_ctcs_api_en)
    {
         ret = ctcs_global_ctl_set(g_api_ldev, type, value);
    }
    else
    {
        ret = ctc_global_ctl_set(type, value);
    }

    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;

}

CTC_CLI(ctc_cli_chip_get_global_config,
        ctc_cli_chip_get_global_config_cmd,
        "show chip global-cfg (pim-snooping-mode | vxlan-udp-dest-port | geneve-udp-dest-port|igmp-snooping-mode|tpoam-vpws-coexist\
                              |arp-derive-mode|vxlan-crypt-udp-dest-port|dot1ae-crypt-ctcsh-udp-dest-port| dot1ae-crypt-ip-protocol |dot1ae-crypt-ip-protocol-with-ctcsh\
                              |vxlan-policer-gid-base|hmac-en|eslabel-en|switch-id|im-en|force-stk-parser|mac-limit-mode\
                              |mpls-im-color-hw-en|max-ipv4-icmp-size|max-ipv6-icmp-size|min-tcp-hdr-size|macda-hit-aging-en\
                              |loop-mode|decaped-force-ipmc|logic-port-isolate-en|logic-rep-threshold|station-move-mode|truncation-mode| truncation-length)",
        "Show",
        "Chip module",
        "Global config",
        "PIM snooping mode",
        "Vxlan udp dest port",
        "Geneve udp dest port",
        "IGMP Snooping mode",
        "TP OAM and VPWS OAM can coexist",
        "ARP derive mode",
        "Vxlan crypt udp dest port",
        "Dot1ae crypt udp dest port",
        "Dot1ae crypt ip protocol",
        "Dot1ae crypt ip protocol with centec security header",
        "Vxlan policer group id base",
        "HMAC enable",
        "EsLabel enable",
        "Used for egress acl action switch id",
        "Mpls IM enable",
        "Force stacking parser",
        "Mac limit mode",
        "Mpls IM color enable by hardware",
        "Max IPv4 ICMP size",
        "Max IPv6 ICMP size",
        "Min TCP header size",
        "Macda hit aging en",
        "Loop mode",
        "Force ipmc after tunnel decap",
        "Logic port isolate enable",
        "Logic replicate threshold",
        "Station move mode",
		"Truncation mode",
        "Truncation length")

{
    int32 ret = CLI_SUCCESS;
    uint8 type = 0;
    uint8 index = 0;
    uint8 loop = 0;
    uint32 val = 0;
    void* value = (void*)&val;
    ctc_global_hmac_t hmac;

    index = CTC_CLI_GET_ARGC_INDEX("pim-snooping-mode");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_PIM_SNOOPING_MODE;
        ctc_cli_out("Show chip global-cfg pim-snooping-mode info\n");
        ctc_cli_out("==============================\n");
    }

    index = CTC_CLI_GET_ARGC_INDEX("vxlan-udp-dest-port");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_VXLAN_UDP_DEST_PORT;
        ctc_cli_out("Show chip global-cfg vxlan-udp-dest-port info\n");
        ctc_cli_out("==============================\n");
    }

    index = CTC_CLI_GET_ARGC_INDEX("geneve-udp-dest-port");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_GENEVE_UDP_DEST_PORT;
        ctc_cli_out("Show chip global-cfg geneve-udp-dest-port info\n");
        ctc_cli_out("==============================\n");
    }
   index = CTC_CLI_GET_ARGC_INDEX("igmp-snooping-mode");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_IGMP_SNOOPING_MODE;
        ctc_cli_out("Show chip global-cfg igmp-snooping-mode info\n");
        ctc_cli_out("==============================\n");
    }
    index = CTC_CLI_GET_ARGC_INDEX("tpoam-vpws-coexist");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_TPOAM_VPWSOAM_COEXIST;
        ctc_cli_out("Show chip global-cfg tpoam-vpws-coexist info\n");
        ctc_cli_out("==============================\n");
    }
    index = CTC_CLI_GET_ARGC_INDEX("arp-derive-mode");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_NH_ARP_MACDA_DERIVE_MODE;
        ctc_cli_out("Show chip global-cfg arp-derive-mode info\n");
        ctc_cli_out("==============================\n");
    }
    index = CTC_CLI_GET_ARGC_INDEX("vxlan-crypt-udp-dest-port");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_VXLAN_CRYPT_UDP_DEST_PORT;
        ctc_cli_out("Show chip global-cfg vxlan-crypt-udp-dest-port info\n");
        ctc_cli_out("==============================\n");
    }
    index = CTC_CLI_GET_ARGC_INDEX("dot1ae-crypt-ctcsh-udp-dest-port");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_DOT1AE_CRYPT_CTCSH_UDP_DEST_PORT;
        ctc_cli_out("Show chip global-cfg dot1ae-crypt-ctcsh-udp-dest-port info\n");
        ctc_cli_out("==============================\n");
    }
    index = CTC_CLI_GET_ARGC_INDEX("dot1ae-crypt-ip-protocol");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_DOT1AE_CRYPT_IP_PROTOCOL;
        ctc_cli_out("Show chip global-cfg dot1ae-crypt-ip-protocol info\n");
        ctc_cli_out("==============================\n");
    }
	index = CTC_CLI_GET_ARGC_INDEX("dot1ae-crypt-ip-protocol-with-ctcsh");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_DOT1AE_CRYPT_CTCSH_IP_PROTOCOL;
        ctc_cli_out("Show chip global-cfg dot1ae-crypt-ip-protocol-with-ctcsh info\n");
        ctc_cli_out("==============================\n");
    }
    index = CTC_CLI_GET_ARGC_INDEX("vxlan-policer-gid-base");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_VXLAN_POLICER_GROUP_ID_BASE;
        ctc_cli_out("Show chip global-cfg vxlan-policer-gid-base info\n");
        ctc_cli_out("==============================\n");
    }
    index = CTC_CLI_GET_ARGC_INDEX("hmac-en");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_HMAC_EN;
        value = (void*)&hmac;
        ctc_cli_out("Show chip global-cfg hmac-en info\n");
        ctc_cli_out("==============================\n");
    }
    index = CTC_CLI_GET_ARGC_INDEX("eslabel-en");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_ESLB_EN;
        ctc_cli_out("Show chip global-cfg eslabel-en info\n");
        ctc_cli_out("==============================\n");
    }
	index = CTC_CLI_GET_ARGC_INDEX("switch-id");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_EACL_SWITCH_ID;
        ctc_cli_out("Show chip global-cfg switch-id\n");
        ctc_cli_out("==============================\n");
    }

    index = CTC_CLI_GET_ARGC_INDEX("im-en");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_NPM_IM_EN;
        ctc_cli_out("Show chip global-cfg im-en info\n");
        ctc_cli_out("==============================\n");
    }
    
    index = CTC_CLI_GET_ARGC_INDEX("force-stk-parser");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_FORCE_STK_PARSER;
        ctc_cli_out("Show chip force-stk-parser info\n");
        ctc_cli_out("==============================\n");
    }
    index = CTC_CLI_GET_ARGC_INDEX("mac-limit-mode");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_MAC_LIMIT_MODE;
        ctc_cli_out("Show chip mac limit mode\n");
        ctc_cli_out("==============================\n");
    }
    index = CTC_CLI_GET_ARGC_INDEX("mpls-im-color-hw-en");
    if (INDEX_VALID(index))
    {
        type = CTC_GLOBAL_NPM_IM_COLOR_HW_EN;
        ctc_cli_out("Show chip global-cfg mpls-im-color-hw-en info\n");
        ctc_cli_out("==============================\n");
    }
    index = CTC_CLI_GET_ARGC_INDEX("max-ipv4-icmp-size");
    if (0xFF != index)
    {
        type = CTC_GLOBAL_MAX_IPV4_ICMP_PKT_SIZE;
        ctc_cli_out("Show chip max-ipv4-icmp-size info\n");
        ctc_cli_out("==============================\n");
    }
    index = CTC_CLI_GET_ARGC_INDEX("max-ipv6-icmp-size");
    if (0xFF != index)
    {
        type = CTC_GLOBAL_MAX_IPV6_ICMP_PKT_SIZE;
        ctc_cli_out("Show chip max-ipv6-icmp-size info\n");
        ctc_cli_out("==============================\n");
    }
    index = CTC_CLI_GET_ARGC_INDEX("min-tcp-hdr-size");
    if (0xFF != index)
    {
        type = CTC_GLOBAL_MIN_TCP_HDR_SIZE;
        ctc_cli_out("Show chip min-tcp-hdr-size info\n");
        ctc_cli_out("==============================\n");
    }

    index = CTC_CLI_GET_ARGC_INDEX("macda-hit-aging-en");
    if (0xFF != index)
    {
        type = CTC_GLOBAL_MACDA_HIT_AGING_EN;
        ctc_cli_out("Show macda hit-aging-en info\n");
        ctc_cli_out("==============================\n");
    }

    index = CTC_CLI_GET_ARGC_INDEX("loop-mode");
    if (0xFF != index)
    {
        type = CTC_GLOBAL_LOOP_MODE;
        ctc_cli_out("Show chip global-cfg loop-mode info\n");
        ctc_cli_out("==============================\n");
    }
    index = CTC_CLI_GET_ARGC_INDEX("decaped-force-ipmc");
    if (0xFF != index)
    {
        type = CTC_GLOBAL_DECAPED_FORCE_IPMC;
        ctc_cli_out("Show chip global-cfg decaped-force-ipmc info\n");
        ctc_cli_out("==============================\n");
    }
    index = CTC_CLI_GET_ARGC_INDEX("logic-rep-threshold");
    if (0xFF != index)
    {
        type = CTC_GLOBAL_MCAST_LOGIC_REP_THRD;
        ctc_cli_out("Show chip global-cfg logic-rep-threshold info\n");
        ctc_cli_out("==============================\n");
    }

    index = CTC_CLI_GET_ARGC_INDEX("logic-port-isolate-en");
    if (0xFF != index)
    {
        type = CTC_GLOBAL_LOGIC_PORT_ISOLATE_EN;
        ctc_cli_out("Show logic-port-isolate-en info\n");
        ctc_cli_out("==============================\n");
    }

    index = CTC_CLI_GET_ARGC_INDEX("station-move-mode");
    if (0xFF != index)
    {
        type = CTC_GLOBAL_STATION_MOVE_MODE;
        ctc_cli_out("Show station-move-mode info\n");
        ctc_cli_out("==============================\n");
    }

    index = CTC_CLI_GET_ARGC_INDEX("truncation-mode");
    if (0xFF != index)
    {
        type = CTC_GLOBAL_TRUNCATION_MODE;
        ctc_cli_out("Show truncation-mode info\n");
        ctc_cli_out("==============================\n");
    }

    index = CTC_CLI_GET_ARGC_INDEX("truncation-length");
    if (0xFF != index)
    {
        type = CTC_GLOBAL_TRUNCATION_LEN;
        ctc_cli_out("Show truncation-length info\n");
        ctc_cli_out("==============================\n");
    }
    if(g_ctcs_api_en)
    {
         ret = ctcs_global_ctl_get(g_api_ldev, type, value);
    }
    else
    {
        ret = ctc_global_ctl_get(type, value);
    }

    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    if (type == CTC_GLOBAL_HMAC_EN)
    {
        ctc_cli_out("value          : %d\n", hmac.enable);
        ctc_cli_out("ip-protocol    : %u\n", hmac.ip_protocol_en? hmac.ip_protocol: 0);
        ctc_cli_out("ip-header-mask : ");
        for (loop=0; loop<CTC_IP_HEADER_LEN; loop++)
        {
            ctc_cli_out("%02x", hmac.ip_header_mask[loop]);
        }
        ctc_cli_out("\n");
    }
    else
    {
        ctc_cli_out("value          : %u\n", val);
    }
    ctc_cli_out("==============================\n");

    return ret;

}

CTC_CLI(ctc_cli_chip_mdio_clock_frequency,
        ctc_cli_chip_mdio_clock_frequency_cmd,
        "chip mdio (gephy|xgphy) freq FREQ",
        "Chip module",
        "Mdio interface",
        "Gephy mdio bus",
        "Xgphy mdio bus",
        "Mdio clock frequency",
        "Frequency value(K)")
{
    int32 ret       = CLI_SUCCESS;
    ctc_chip_mdio_type_t type;
    uint16 freq = 0;

    if (CLI_CLI_STR_EQUAL("gephy", 0))
    {
        type = CTC_CHIP_MDIO_GE;
    }
    else
    {
        type = CTC_CHIP_MDIO_XG;
    }

    CTC_CLI_GET_UINT16_RANGE("freq", freq, argv[1], 0, CTC_MAX_UINT16_VALUE);

    if(g_ctcs_api_en)
    {
         ret = ctcs_chip_set_mdio_clock(g_api_ldev, type, freq);
    }
    else
    {
        ret = ctc_chip_set_mdio_clock(type, freq);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;

}

CTC_CLI(ctc_cli_chip_show_mdio_clock_frequency,
        ctc_cli_chip_show_mdio_clock_frequency_cmd,
        "show chip mdio (gephy|xgphy) freq",
        "Show",
        "Chip module",
        "Mdio interface",
        "Gephy mdio bus",
        "Xgphy mdio bus",
        "Mdio clock frequency")
{
    int32 ret       = CLI_SUCCESS;
    ctc_chip_mdio_type_t type;
    uint16 freq = 0;

    if (CLI_CLI_STR_EQUAL("gephy", 0))
    {
        type = CTC_CHIP_MDIO_GE;
    }
    else
    {
        type = CTC_CHIP_MDIO_XG;
    }

    if(g_ctcs_api_en)
    {
         ret = ctcs_chip_get_mdio_clock(g_api_ldev, type, &freq);
    }
    else
    {
        ret = ctc_chip_get_mdio_clock(type, &freq);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("Mdio clock frequency is %u Khz \n", freq);

    return ret;

}


CTC_CLI(ctc_cli_chip_show_sensor_value,
        ctc_cli_chip_show_sensor_value_cmd,
        "show chip sensor (temp|voltage) ",
        "Show",
        "Chip module",
        "Sensor interface",
        "Temperature sensor",
        "Voltage sensor")
{
    int32 ret       = CLI_SUCCESS;
    ctc_chip_sensor_type_t type;
    uint32 value = 0;

    if (CLI_CLI_STR_EQUAL("temp", 0))
    {
        type = CTC_CHIP_SENSOR_TEMP;
    }
    else
    {
        type = CTC_CHIP_SENSOR_VOLTAGE;
    }



    if(g_ctcs_api_en)
    {
         ret = ctcs_get_chip_sensor(g_api_ldev, type, &value);
    }
    else
    {
        ret = ctc_get_chip_sensor(g_api_ldev, type, &value);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    if (CTC_CHIP_SENSOR_TEMP == type)
    {
        if (CTC_IS_BIT_SET(value, 31))
        {
            ctc_cli_out("Temperature is -%d C \n", value&0x7FFFFFFF);
        }
        else
        {
            ctc_cli_out("Temperature is %d C \n", value);
        }
    }
    else
    {
        ctc_cli_out("Voltage is %d mV \n", value);
    }

    return ret;

}

CTC_CLI(ctc_cli_chip_show_sensors_value,
        ctc_cli_chip_show_sensors_cmd,
        "show chip sensors (temp|voltage)",
        "Show",
        "Ship module",
        "Sensor interface",
        "Temperature sensor",
        "Voltage sensor")
{
    int32 ret       = CLI_SUCCESS;
    ctc_chip_sensor_t  sensor;
    uint8  loop = 0;

    if (CLI_CLI_STR_EQUAL("temp", 0))
    {
        sensor.type = CTC_CHIP_SENSOR_TEMP;
    }
    else
    {
        sensor.type = CTC_CHIP_SENSOR_VOLTAGE;
    }


    if (g_ctcs_api_en)
    {
        ret = ctcs_chip_get_property(g_api_ldev, CTC_CHIP_PROP_SENSOR, &sensor);
    }
    else
    {
        ret = ctc_chip_get_property(g_api_ldev, CTC_CHIP_PROP_SENSOR, &sensor);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    if (CTC_CHIP_SENSOR_TEMP == sensor.type)
    {
        for (loop=0; loop < sensor.count; loop++)
        {
            if (CTC_IS_BIT_SET(sensor.value[loop], 31))
            {
                ctc_cli_out("Temperature[%d] is -%d C \n",loop,sensor.value[loop]&0x7FFFFFFF);
            }
            else
            {
                ctc_cli_out("Temperature[%d] is %d C \n",loop,sensor.value[loop]);
            }
        }
    }
    else
    {
        for (loop=0; loop < sensor.count; loop++)
        {
            ctc_cli_out("Voltage[%d] is %d mV \n",loop,sensor.value[loop]);
        }
    }

    return ret;

}

CTC_CLI(ctc_cli_chip_debug_on,
        ctc_cli_chip_debug_on_cmd,
        "debug chip (chip|peri|eunit|register) (ctc|sys) (debug-level {func|param|info|error} |)",
        CTC_CLI_DEBUG_STR,
        "Chip module",
        "Chip module",
        "Peripheral module",
        "Eunit module",
        "Register module",
        "CTC layer",
        "Sys layer",
        CTC_CLI_DEBUG_LEVEL_STR,
        CTC_CLI_DEBUG_LEVEL_FUNC,
        CTC_CLI_DEBUG_LEVEL_PARAM,
        CTC_CLI_DEBUG_LEVEL_INFO,
        CTC_CLI_DEBUG_LEVEL_ERROR)
{

    uint32 typeenum = 0;
    uint8 level = CTC_DEBUG_LEVEL_INFO | CTC_DEBUG_LEVEL_FUNC | CTC_DEBUG_LEVEL_PARAM | CTC_DEBUG_LEVEL_ERROR;
    uint8 index = 0;

    index = CTC_CLI_GET_ARGC_INDEX("debug-level");
    if (index != 0xFF)
    {
        level = CTC_DEBUG_LEVEL_NONE;
        index = CTC_CLI_GET_ARGC_INDEX("func");
        if (index != 0xFF)
        {
            level |= CTC_DEBUG_LEVEL_FUNC;
        }

        index = CTC_CLI_GET_ARGC_INDEX("param");
        if (index != 0xFF)
        {
            level |= CTC_DEBUG_LEVEL_PARAM;
        }

        index = CTC_CLI_GET_ARGC_INDEX("info");
        if (index != 0xFF)
        {
            level |= CTC_DEBUG_LEVEL_INFO;
        }

        index = CTC_CLI_GET_ARGC_INDEX("error");
        if (index != 0xFF)
        {
            level |= CTC_DEBUG_LEVEL_ERROR;
        }
    }

    if(0 == sal_memcmp(argv[0], "chip", 4))
    {
        if (0 == sal_memcmp(argv[1], "ctc", 3))
        {
            typeenum = CHIP_CTC;

        }
        else
        {
            typeenum = CHIP_SYS;

        }
        ctc_debug_set_flag("chip", "chip", typeenum, level, TRUE);
    }
    else if(0 == sal_memcmp(argv[0], "peri", 4))
    {
        if (0 == sal_memcmp(argv[1], "ctc", 3))
        {
            typeenum = PERI_CTC;

        }
        else
        {
            typeenum = PERI_SYS;

        }
        ctc_debug_set_flag("chip", "peri", typeenum, level, TRUE);
    }
    else if(0 == sal_memcmp(argv[0], "eunit", 5))
    {
        if (0 == sal_memcmp(argv[1], "ctc", 3))
        {
            typeenum = EUNIT_CTC;
        }
        else
        {
            typeenum = EUNIT_SYS;

        }
        ctc_debug_set_flag("chip", "eunit", typeenum, level, TRUE);
    }
    else if(0 == sal_memcmp(argv[0], "register", 6))
    {
        if (0 == sal_memcmp(argv[1], "ctc", 3))
        {
            typeenum = REGISTER_CTC;
        }
        else
        {
            typeenum = REGISTER_SYS;

        }
        ctc_debug_set_flag("register", "register", typeenum, level, TRUE);
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_chip_debug_off,
        ctc_cli_chip_debug_off_cmd,
        "no debug chip (chip|peri|eunit|register) (ctc | sys)",
        CTC_CLI_NO_STR,
        CTC_CLI_DEBUG_STR,
        "Chip Module",
        "Chip sub module",
        "Peripheral sub module",
        "Eunit sub module",
        "Register module",
        "Ctc layer",
        "Sys layer")
{
    uint32 typeenum = 0;
    uint8 level = 0;

    if (0 == sal_memcmp(argv[0], "chip", 3))
    {
        if (0 == sal_memcmp(argv[1], "ctc", 3))
        {
            typeenum = CHIP_CTC;
        }
        else if (0 == sal_memcmp(argv[1], "sys", 3))
        {
            typeenum = CHIP_SYS;
        }
        ctc_debug_set_flag("chip", "chip", typeenum, level, FALSE);
    }
    else if (0 == sal_memcmp(argv[0], "peri", 3))
    {
        if (0 == sal_memcmp(argv[1], "ctc", 3))
        {
            typeenum = PERI_CTC;
        }
        else if (0 == sal_memcmp(argv[1], "sys", 3))
        {
            typeenum = PERI_SYS;
        }
        ctc_debug_set_flag("chip", "peri", typeenum, level, FALSE);
    }
    else if (0 == sal_memcmp(argv[0], "eunit", 5))
    {
        if (0 == sal_memcmp(argv[1], "ctc", 3))
        {
            typeenum = EUNIT_CTC;
        }
        else if (0 == sal_memcmp(argv[1], "sys", 3))
        {
            typeenum = EUNIT_SYS;
        }
        ctc_debug_set_flag("chip", "eunit", typeenum, level, FALSE);
    }
    else if(0 == sal_memcmp(argv[0], "register", 8))
    {
        if (0 == sal_memcmp(argv[1], "ctc", 3))
        {
            typeenum = REGISTER_CTC;
        }
        else
        {
            typeenum = REGISTER_SYS;

        }
        ctc_debug_set_flag("register", "register", typeenum, level, FALSE);
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_chip_show_debug,
        ctc_cli_chip_show_debug_cmd,
        "show debug chip (ctc | sys)",
        CTC_CLI_SHOW_STR,
        CTC_CLI_DEBUG_STR,
        "Chip Module",
        "Ctc layer",
        "Sys layer")
{
    uint32 typeenum = 0;
    uint8 level = 0;
    uint8 en = 0;

    if (0 == sal_memcmp(argv[0], "ctc", 3))
    {
        typeenum = CHIP_CTC;
    }
    else if (0 == sal_memcmp(argv[0], "sys", 3))
    {
        typeenum = CHIP_SYS;
    }
    en = ctc_debug_get_flag("chip", "chip", typeenum, &level);
    ctc_cli_out("chip:%s debug %s level:%s\n", argv[0],
                en ? "on" : "off", ctc_cli_get_debug_desc(level));

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_chip_serdes_prbs,
        ctc_cli_chip_serdes_prbs_cmd,
        "chip serdes SERDES (prbs (tx (enable|disable)|rx) mode VALUE) ",
        "Chip module",
        "Serdes",
        "Serdes ID",
        "Pseudo random binary sequence",
        "Transmit prbs pattern",
        CTC_CLI_ENABLE,
        CTC_CLI_DISABLE,
        "Receive prbs pattern and check",
        "Pattern mode",
        "\n0-PRBS7_PLUS, 1-PRBS7_SUB, 2-PRBS15_PLUS, 3-PRBS15_SUB, 4-PRBS23_PLUS, 5-PRBS23_SUB, 6-PRBS31_PLUS, 7-PRBS31_SUB   \
        \n8-PRBS9, 9-PRBS13, 10-PRBS9Q, 11-PRBS13Q, 12-PRBS15Q, 13-PRBS31Q, 14-PRBS9QP, 15-PRBS13QP, 16-PRBS15QP, 17-PRBS31QP\n")
{
    int32 ret       = CLI_SUCCESS;
    ctc_chip_serdes_prbs_t prbs_param;
    uint16 serdes_id = 0;
    
    uint8 index = 0;

    sal_memset(&prbs_param, 0, sizeof(ctc_chip_serdes_prbs_t));

    CTC_CLI_GET_UINT16_RANGE("serdes", serdes_id, argv[0], 0, CTC_MAX_UINT16_VALUE);

    prbs_param.serdes_id = serdes_id;

    /* prbs cfg */
    index = CTC_CLI_GET_ARGC_INDEX("enable");
    if (0xFF != index)
    {
        prbs_param.value = 1;
    }

    index = CTC_CLI_GET_ARGC_INDEX("disable");
    if (0xFF != index)
    {
        prbs_param.value = 0;
    }

    index = CTC_CLI_GET_ARGC_INDEX("rx");
    if (0xFF != index)
    {
        prbs_param.mode = 0;
    }

    index = CTC_CLI_GET_ARGC_INDEX("tx");
    if (0xFF != index)
    {
        prbs_param.mode = 1;
    }

    index = CTC_CLI_GET_ARGC_INDEX("mode");
    if (index != 0xFF)
    {
        CTC_CLI_GET_UINT8_RANGE("mode", prbs_param.polynome_type, argv[index + 1], 0, CTC_MAX_UINT8_VALUE);
    }



    if(g_ctcs_api_en)
    {
         ret = ctcs_chip_set_property(g_api_ldev, CTC_CHIP_PROP_SERDES_PRBS, (void*)&prbs_param);
    }
    else
    {
        ret = ctc_chip_set_property(g_api_ldev, CTC_CHIP_PROP_SERDES_PRBS, (void*)&prbs_param);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    index = CTC_CLI_GET_ARGC_INDEX("rx");
    if (0xFF != index)
    {
        ctc_cli_out("%d\n",prbs_param.value);
    }

    return ret;

}

CTC_CLI(ctc_cli_chip_serdes_param,
        ctc_cli_chip_serdes_param_cmd,
        "chip serdes SERDES ffe mode (((user-define | 3ap) {c0 VALUE|c1 VALUE|c2 VALUE|c3 VALUE|c4 VALUE |c5 VALUE})| \
        (typical (board-type (fr4|m4|m6) (trace-len (4inch|7inch|10inch|8inch|9inch|9+inch)|)))) ",
        "Chip module",
        "Serdes",
        "Serdes id",
        "Ffe parameter",
        "Ffe cfg mode",
        "Traditional mode, support copper and fiber",
        "802.3ap mode, only support copper",
        "Coefficient0",
        "Coefficient0 VALUE",
        "Coefficient1",
        "Coefficient1 VALUE",
        "Coefficient2",
        "Coefficient2 VALUE",
        "Coefficient3",
        "Coefficient3 VALUE",
        "Coefficient4",
        "Coefficient4 VALUE",
        "Coefficient5",
        "Coefficient5 VALUE",
        "Typical mode, cfg ffe by motherboard material and trace length",
        "Mother board type",
        "FR4 material",
        "M4 material",
        "M6 material",
        "Trace length",
        "0~4inch",
        "4~7inch",
        "7~10inch",
        "7~8inch, only for FR4",
        "8~9inch, only for FR4",
        ">9inch, only for FR4")
{
    int32 ret       = CLI_SUCCESS;
    ctc_chip_serdes_ffe_t  ffe_param;
    uint16 serdes_id = 0;
    
    uint8 index = 0;
    int16 coefficient[CTC_CHIP_FFE_PARAM_NUM];
    sal_memset(&ffe_param, 0, sizeof(ctc_chip_serdes_ffe_t));
    sal_memset(coefficient, 0, sizeof(int16)*CTC_CHIP_FFE_PARAM_NUM);

    CTC_CLI_GET_UINT16_RANGE("serdes", serdes_id, argv[0], 0, CTC_MAX_UINT16_VALUE);

    ffe_param.serdes_id = serdes_id;

    index = CTC_CLI_GET_ARGC_INDEX("user-define");
    if (0xFF != index)
    {
        ffe_param.mode = CTC_CHIP_SERDES_FFE_MODE_DEFINE;
    }

    index = CTC_CLI_GET_ARGC_INDEX("3ap");
    if (0xFF != index)
    {
        ffe_param.mode = CTC_CHIP_SERDES_FFE_MODE_3AP;
    }

    index = CTC_CLI_GET_ARGC_INDEX("typical");
    if (0xFF != index)
    {
        ffe_param.mode = CTC_CHIP_SERDES_FFE_MODE_TYPICAL;
    }

    index = CTC_CLI_GET_ARGC_INDEX("m6");
    if (0xFF != index)
    {
        ffe_param.board_material = 2;
    }

    index = CTC_CLI_GET_ARGC_INDEX("m4");
    if (0xFF != index)
    {
        ffe_param.board_material = 1;
    }

    index = CTC_CLI_GET_ARGC_INDEX("fr4");
    if (0xFF != index)
    {
        ffe_param.board_material = 0;
    }

    index = CTC_CLI_GET_ARGC_INDEX("4inch");
    if (0xFF != index)
    {
        ffe_param.trace_len = 0;
    }

    index = CTC_CLI_GET_ARGC_INDEX("7inch");
    if (0xFF != index)
    {
        ffe_param.trace_len = 1;
    }

    index = CTC_CLI_GET_ARGC_INDEX("10inch");
    if (0xFF != index)
    {
        ffe_param.trace_len = 2;
    }

    index = CTC_CLI_GET_ARGC_INDEX("8inch");
    if (0xFF != index)
    {
        ffe_param.trace_len = 2;
    }

    index = CTC_CLI_GET_ARGC_INDEX("9inch");
    if (0xFF != index)
    {
        ffe_param.trace_len = 3;
    }

    index = CTC_CLI_GET_ARGC_INDEX("9+inch");
    if (0xFF != index)
    {
        ffe_param.trace_len = 4;
    }
    index = CTC_CLI_GET_ARGC_INDEX("c0");
    if (index != 0xFF)
    {
        CTC_CLI_GET_INTEGER_RANGE("c0", coefficient[0], argv[index + 1], -0x3fff, 0x3fff);
    }

    index = CTC_CLI_GET_ARGC_INDEX("c1");
    if (index != 0xFF)
    {
        CTC_CLI_GET_INTEGER_RANGE("c1", coefficient[1], argv[index + 1], -0x3fff, 0x3fff);
    }

    index = CTC_CLI_GET_ARGC_INDEX("c2");
    if (index != 0xFF)
    {
        CTC_CLI_GET_INTEGER_RANGE("c2", coefficient[2], argv[index + 1], -0x3fff, 0x3fff);
    }

    index = CTC_CLI_GET_ARGC_INDEX("c3");
    if (index != 0xFF)
    {
       CTC_CLI_GET_INTEGER_RANGE("c3", coefficient[3], argv[index + 1], -0x3fff, 0x3fff);
    }

    index = CTC_CLI_GET_ARGC_INDEX("c4");
    if (index != 0xFF)
    {
       CTC_CLI_GET_INTEGER_RANGE("c4", coefficient[4], argv[index + 1], -0x3fff, 0x3fff);
    }

    index = CTC_CLI_GET_ARGC_INDEX("c5");
    if (index != 0xFF)
    {
       CTC_CLI_GET_INTEGER_RANGE("c5", coefficient[5], argv[index + 1], -0x3fff, 0x3fff);
    }

    sal_memcpy(ffe_param.coefficient, coefficient, sizeof(coefficient));


    if(g_ctcs_api_en)
    {
         ret = ctcs_chip_set_property(g_api_ldev, CTC_CHIP_PROP_SERDES_FFE, (void*)&ffe_param);
    }
    else
    {
        ret = ctc_chip_set_property(g_api_ldev, CTC_CHIP_PROP_SERDES_FFE, (void*)&ffe_param);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;

}


CTC_CLI(ctc_cli_chip_serdes_poly,
        ctc_cli_chip_serdes_poly_cmd,
        "chip serdes SERDES poly (reverse|normal) dir (rx|tx) ",
        "Chip module",
        "Serdes",
        "Serdes id",
        "Poly parameter",
        "Poly reverse",
        "Poly normal",
        "Direction",
        "Recieve dir",
        "Transmit dir")
{
    int32 ret       = CLI_SUCCESS;
    ctc_chip_serdes_polarity_t  polarity_param;
    uint16 serdes_id = 0;
    
    uint8 index = 0;

    sal_memset(&polarity_param, 0, sizeof(ctc_chip_serdes_polarity_t));

    CTC_CLI_GET_UINT16_RANGE("serdes", serdes_id, argv[0], 0, CTC_MAX_UINT16_VALUE);

    polarity_param.serdes_id = serdes_id;

    index = CTC_CLI_GET_ARGC_INDEX("reverse");
    if (0xFF != index)
    {
        polarity_param.polarity_mode = 1;
    }

    index = CTC_CLI_GET_ARGC_INDEX("normal");
    if (0xFF != index)
    {
        polarity_param.polarity_mode = 0;
    }

    index = CTC_CLI_GET_ARGC_INDEX("rx");
    if (0xFF != index)
    {
        polarity_param.dir = 0;
    }

    index = CTC_CLI_GET_ARGC_INDEX("tx");
    if (0xFF != index)
    {
        polarity_param.dir = 1;
    }



    if(g_ctcs_api_en)
    {
        ret = ctcs_chip_set_property(g_api_ldev, CTC_CHIP_PEOP_SERDES_POLARITY, (void*)&polarity_param);
    }
    else
    {
        ret = ctc_chip_set_property(g_api_ldev, CTC_CHIP_PEOP_SERDES_POLARITY, (void*)&polarity_param);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;

}

CTC_CLI(ctc_cli_chip_serdes_id_map,
        ctc_cli_chip_serdes_id_map_cmd,
        "chip serdes map VALUE0 VALUE1 VALUE2 VALUE3 VALUE4 VALUE5 VALUE6 VALUE7 ",
        "Chip module",
        "Serdes",
        "Reorder serdes id in HSS",
        "Serdes 0 in hss",
        "Serdes 1 in hss",
        "Serdes 2 in hss",
        "Serdes 3 in hss",
        "Serdes 4 in hss",
        "Serdes 5 in hss",
        "Serdes 6 in hss",
        "Serdes 7 in hss")
{
    int32 ret = CLI_SUCCESS;
    ctc_chip_serdes_map_cfg_t  map_cfg;

    sal_memset(&map_cfg, 0, sizeof(ctc_chip_serdes_map_cfg_t));

    CTC_CLI_GET_UINT16_RANGE("VALUE0", map_cfg.serdes_id[0], argv[0], 0, CTC_MAX_UINT16_VALUE);
    CTC_CLI_GET_UINT16_RANGE("VALUE1", map_cfg.serdes_id[1], argv[1], 0, CTC_MAX_UINT16_VALUE);
    CTC_CLI_GET_UINT16_RANGE("VALUE2", map_cfg.serdes_id[2], argv[2], 0, CTC_MAX_UINT16_VALUE);
    CTC_CLI_GET_UINT16_RANGE("VALUE3", map_cfg.serdes_id[3], argv[3], 0, CTC_MAX_UINT16_VALUE);
    CTC_CLI_GET_UINT16_RANGE("VALUE4", map_cfg.serdes_id[4], argv[4], 0, CTC_MAX_UINT16_VALUE);
    CTC_CLI_GET_UINT16_RANGE("VALUE5", map_cfg.serdes_id[5], argv[5], 0, CTC_MAX_UINT16_VALUE);
    CTC_CLI_GET_UINT16_RANGE("VALUE6", map_cfg.serdes_id[6], argv[6], 0, CTC_MAX_UINT16_VALUE);
    CTC_CLI_GET_UINT16_RANGE("VALUE7", map_cfg.serdes_id[7], argv[7], 0, CTC_MAX_UINT16_VALUE);


    if(g_ctcs_api_en)
    {
        ret = ctcs_chip_set_property(g_api_ldev, CTC_CHIP_PROP_SERDES_MAP, (void*)&map_cfg);
    }
    else
    {
        ret = ctc_chip_set_property(g_api_ldev, CTC_CHIP_PROP_SERDES_MAP, (void*)&map_cfg);
    }

    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }
    return ret;

}

CTC_CLI(ctc_cli_chip_serdes_loopback,
        ctc_cli_chip_serdes_loopback_cmd,
        "chip serdes SERDES loopback (internal|external|local|pcs) (enable|disable) ",
        "Chip module",
        "Serdes",
        "Serdes id",
        "Loopback parameter",
        "Internal loopback",
        "External loopback",
        "Local digital serial loopback",
        "Pcs      loopback",
        "Enable",
        "Disable")
{
    int32 ret       = CLI_SUCCESS;
    ctc_chip_serdes_loopback_t  lb_param;
    uint16 serdes_id = 0;
    
    uint8 index = 0;

    sal_memset(&lb_param, 0, sizeof(ctc_chip_serdes_loopback_t));

    CTC_CLI_GET_UINT16_RANGE("serdes", serdes_id, argv[0], 0, CTC_MAX_UINT16_VALUE);

    lb_param.serdes_id = serdes_id;

    index = CTC_CLI_GET_ARGC_INDEX("internal");
    if (0xFF != index)
    {
        lb_param.mode = 0;
    }

    index = CTC_CLI_GET_ARGC_INDEX("external");
    if (0xFF != index)
    {
        lb_param.mode = 1;
    }

    index = CTC_CLI_GET_ARGC_INDEX("local");
    if (0xFF != index)
    {
        lb_param.mode = 2;
    }

    index = CTC_CLI_GET_ARGC_INDEX("pcs");
    if (0xFF != index)
    {
        lb_param.mode = 3;
    }
    index = CTC_CLI_GET_ARGC_INDEX("disable");
    if (0xFF != index)
    {
        lb_param.enable = 0;
    }

    index = CTC_CLI_GET_ARGC_INDEX("enable");
    if (0xFF != index)
    {
        lb_param.enable = 1;
    }



    if(g_ctcs_api_en)
    {
        ret = ctcs_chip_set_property(g_api_ldev, CTC_CHIP_PROP_SERDES_LOOPBACK, (void*)&lb_param);
    }
    else
    {
        ret = ctc_chip_set_property(g_api_ldev, CTC_CHIP_PROP_SERDES_LOOPBACK, (void*)&lb_param);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;

}

CTC_CLI(ctc_cli_chip_serdes_p_flag,
        ctc_cli_chip_serdes_p_flag_cmd,
        "chip serdes SERDES p-flag (enable|disable) ",
        "Chip module",
        "Serdes",
        "Serdes id",
        "P-flag",
        "Enable",
        "Disable")
{
    int32 ret       = CLI_SUCCESS;
    ctc_chip_serdes_cfg_t  pflag_param;
    uint16 serdes_id = 0;
    
    uint8 index = 0;

    sal_memset(&pflag_param, 0, sizeof(ctc_chip_serdes_cfg_t));

    CTC_CLI_GET_UINT16_RANGE("serdes", serdes_id, argv[0], 0, CTC_MAX_UINT16_VALUE);

    pflag_param.serdes_id = serdes_id;

    index = CTC_CLI_GET_ARGC_INDEX("disable");
    if (0xFF != index)
    {
        pflag_param.value = 0;
    }

    index = CTC_CLI_GET_ARGC_INDEX("enable");
    if (0xFF != index)
    {
        pflag_param.value = 1;
    }



    if(g_ctcs_api_en)
    {
        ret = ctcs_chip_set_property(g_api_ldev, CTC_CHIP_PROP_SERDES_P_FLAG, (void*)&pflag_param);
    }
    else
    {
        ret = ctc_chip_set_property(g_api_ldev, CTC_CHIP_PROP_SERDES_P_FLAG, (void*)&pflag_param);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;

}


CTC_CLI(ctc_cli_chip_serdes_peak,
        ctc_cli_chip_serdes_peak_cmd,
        "chip serdes SERDES peak VALUE ",
        "Chip module",
        "Serdes",
        "Serdes id",
        "Peaking",
        "Value")
{
    int32 ret       = CLI_SUCCESS;
    ctc_chip_serdes_cfg_t  peak_param;
    uint16 serdes_id = 0;

    sal_memset(&peak_param, 0, sizeof(ctc_chip_serdes_cfg_t));

    CTC_CLI_GET_UINT16_RANGE("serdes", serdes_id, argv[0], 0, CTC_MAX_UINT16_VALUE);
    CTC_CLI_GET_UINT16_RANGE("peak-value", peak_param.value, argv[1], 0, CTC_MAX_UINT16_VALUE);

    peak_param.serdes_id = serdes_id;



    if(g_ctcs_api_en)
    {
        ret = ctcs_chip_set_property(g_api_ldev, CTC_CHIP_PROP_SERDES_PEAK, (void*)&peak_param);
    }
    else
    {
        ret = ctc_chip_set_property(g_api_ldev, CTC_CHIP_PROP_SERDES_PEAK, (void*)&peak_param);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;

}

CTC_CLI(ctc_cli_chip_serdes_dpc,
        ctc_cli_chip_serdes_dpc_cmd,
        "chip serdes SERDES dpc (enable|disable) ",
        "Chip module",
        "Serdes",
        "Serdes id",
        "Dynamic Peaking Control",
        "Enable",
        "Disable")
{
    int32 ret       = CLI_SUCCESS;
    ctc_chip_serdes_cfg_t  dpc_param;
    uint16 serdes_id = 0;
    
    uint8 index = 0;

    sal_memset(&dpc_param, 0, sizeof(ctc_chip_serdes_cfg_t));

    CTC_CLI_GET_UINT16_RANGE("serdes", serdes_id, argv[0], 0, CTC_MAX_UINT16_VALUE);

    dpc_param.serdes_id = serdes_id;

    index = CTC_CLI_GET_ARGC_INDEX("disable");
    if (0xFF != index)
    {
        dpc_param.value = 0;
    }

    index = CTC_CLI_GET_ARGC_INDEX("enable");
    if (0xFF != index)
    {
        dpc_param.value = 1;
    }




    if(g_ctcs_api_en)
    {
        ret = ctcs_chip_set_property(g_api_ldev, CTC_CHIP_PROP_SERDES_DPC, (void*)&dpc_param);
    }
    else
    {
        ret = ctc_chip_set_property(g_api_ldev, CTC_CHIP_PROP_SERDES_DPC, (void*)&dpc_param);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;

}

CTC_CLI(ctc_cli_chip_serdes_slew_rate,
        ctc_cli_chip_serdes_slew_rate_cmd,
        "chip serdes SERDES slew-rate VALUE ",
        "Chip module",
        "Serdes",
        "Serdes id",
        "Slew rate",
        "Value")
{
    int32 ret       = CLI_SUCCESS;
    ctc_chip_serdes_cfg_t  slew_rate_param;
    uint16 serdes_id = 0;

    sal_memset(&slew_rate_param, 0, sizeof(ctc_chip_serdes_cfg_t));

    CTC_CLI_GET_UINT16_RANGE("serdes", serdes_id, argv[0], 0, CTC_MAX_UINT16_VALUE);
    CTC_CLI_GET_UINT16_RANGE("slew rate", slew_rate_param.value, argv[1], 0, CTC_MAX_UINT16_VALUE);

    slew_rate_param.serdes_id = serdes_id;



    if(g_ctcs_api_en)
    {
        ret = ctcs_chip_set_property(g_api_ldev, CTC_CHIP_PROP_SERDES_SLEW_RATE, (void*)&slew_rate_param);
    }
    else
    {
        ret = ctc_chip_set_property(g_api_ldev, CTC_CHIP_PROP_SERDES_SLEW_RATE, (void*)&slew_rate_param);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;

}

CTC_CLI(ctc_cli_chip_serdes_clte_rate,
        ctc_cli_chip_serdes_ctle_cmd,
        "chip serdes SERDES ctle (auto-en| VALUE0 VALUE1 VALUE2) ",
        "Chip module",
        "Serdes",
        "Serdes id",
        "Ctle parameter",
        "Auto Enable",
        "Value0",
        "Value1",
        "Value2")
{
    int32 ret       = CLI_SUCCESS;
    ctc_chip_serdes_ctle_t  ctle_param;
    uint16 serdes_id = 0;
    
    uint8 index = 0;

    sal_memset(&ctle_param, 0, sizeof(ctc_chip_serdes_ctle_t));

    CTC_CLI_GET_UINT16_RANGE("serdes", serdes_id, argv[0], 0, CTC_MAX_UINT16_VALUE);
    index = CTC_CLI_GET_ARGC_INDEX("auto-en");
    if (0xFF != index)
    {
        ctle_param.auto_en=1;
    }
    else
    {
        CTC_CLI_GET_UINT16_RANGE("ctle", ctle_param.value[0], argv[1], 0, CTC_MAX_UINT16_VALUE);
        CTC_CLI_GET_UINT16_RANGE("ctle", ctle_param.value[1], argv[2], 0, CTC_MAX_UINT16_VALUE);
        CTC_CLI_GET_UINT16_RANGE("ctle", ctle_param.value[2], argv[3], 0, CTC_MAX_UINT16_VALUE);
    }



    ctle_param.serdes_id = serdes_id;



    if(g_ctcs_api_en)
    {
        ret = ctcs_chip_set_property(g_api_ldev, CTC_CHIP_PROP_SERDES_CTLE, (void*)&ctle_param);
    }
    else
    {
        ret = ctc_chip_set_property(g_api_ldev, CTC_CHIP_PROP_SERDES_CTLE, (void*)&ctle_param);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;

}

CTC_CLI(ctc_cli_chip_get_serdes_prop,
        ctc_cli_chip_get_serdes_prop_cmd,
        "show chip serdes SERDES (p-flag |peak |dpc |slew-rate | ffe (typical| user-define| 3ap)| loopback | polarity | ctle | prbs (rx|tx) | eye-diagram (open|total|) | dfe | optical-mode|direction (ingress|egress|both) (reset|))",
        "Show operate",
        "Chip module",
        "Serdes",
        "Serdes id",
        "P-flag",
        "Peaking",
        "Dynamic Peaking Control",
        "Slew rate",
        "FFE parameter",
        "Typical mode",
        "User define mode",
        "802.3ap mode",
        "Loopback",
        "Polarity",
        "Ctle",
        "PRBS",
        "Rx",
        "Tx",
        "Eye diagram",
        "Open",
        "Total",
        "Dfe",
        "Optical mode",
        "Direction",
        "Ingress",
        "Egress",
        "Both direction",
        "Reset")
{
    int32 ret       = CLI_SUCCESS;
    ctc_chip_serdes_cfg_t  cfg_param;
    ctc_chip_serdes_ffe_t ffe_param;
    ctc_chip_serdes_polarity_t pola_param;
    ctc_chip_serdes_loopback_t lb_param;
    ctc_chip_serdes_ctle_t ctle_param;
    ctc_chip_serdes_prbs_t prbs_param;
    ctc_chip_serdes_eye_diagram_t eye_param;
    uint16 x = 0;
    uint16 y = 0;
    int16 coefficient[CTC_CHIP_FFE_PARAM_NUM];
    uint16 serdes_id = 0;
    
    uint8 index = 0;
    uint8 type = 0;
    uint8 temp = 0;
    uint8 i = 0;

    CTC_CLI_GET_UINT16_RANGE("serdes", serdes_id, argv[0], 0, CTC_MAX_UINT16_VALUE);

    ctc_cli_out("Show Serdes                        :  0x%x\n", serdes_id);
    ctc_cli_out("-------------------------------------------\n");



    index = CTC_CLI_GET_ARGC_INDEX("p-flag");
    if (0xFF != index)
    {
        sal_memset(&cfg_param, 0, sizeof(ctc_chip_serdes_cfg_t));
        type = CTC_CHIP_PROP_SERDES_P_FLAG;
        cfg_param.serdes_id = serdes_id;

        if(g_ctcs_api_en)
        {
             ret = ctcs_chip_get_property(g_api_ldev, type, (void*)&cfg_param);
        }
        else
        {
            ret = ctc_chip_get_property(g_api_ldev, type, (void*)&cfg_param);
        }
        if (ret < 0)
        {
            ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
            return CLI_ERROR;
        }

        ctc_cli_out("%-34s:  %u\n", "P-flag", cfg_param.value);
    }


    index = CTC_CLI_GET_ARGC_INDEX("peak");
    if (0xFF != index)
    {
        sal_memset(&cfg_param, 0, sizeof(ctc_chip_serdes_cfg_t));
        type = CTC_CHIP_PROP_SERDES_PEAK;
        cfg_param.serdes_id = serdes_id;

        if(g_ctcs_api_en)
        {
             ret = ctcs_chip_get_property(g_api_ldev, type, (void*)&cfg_param);
        }
        else
        {
            ret = ctc_chip_get_property(g_api_ldev, type, (void*)&cfg_param);
        }
        if (ret < 0)
        {
            ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
            return CLI_ERROR;
        }

        ctc_cli_out("%-34s:  %u\n", "Peak", cfg_param.value);
    }

    index = CTC_CLI_GET_ARGC_INDEX("dpc");
    if (0xFF != index)
    {
        sal_memset(&cfg_param, 0, sizeof(ctc_chip_serdes_cfg_t));
        type = CTC_CHIP_PROP_SERDES_DPC;
        cfg_param.serdes_id = serdes_id;

        if(g_ctcs_api_en)
        {
             ret = ctcs_chip_get_property(g_api_ldev, type, (void*)&cfg_param);
        }
        else
        {
            ret = ctc_chip_get_property(g_api_ldev, type, (void*)&cfg_param);
        }
        if (ret < 0)
        {
            ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
            return CLI_ERROR;
        }

        ctc_cli_out("%-34s:  %u\n", "DPC", cfg_param.value);
    }

    index = CTC_CLI_GET_ARGC_INDEX("slew-rate");
    if (0xFF != index)
    {
        sal_memset(&cfg_param, 0, sizeof(ctc_chip_serdes_cfg_t));
        type = CTC_CHIP_PROP_SERDES_SLEW_RATE;
        cfg_param.serdes_id = serdes_id;

        if(g_ctcs_api_en)
        {
             ret = ctcs_chip_get_property(g_api_ldev, type, (void*)&cfg_param);
        }
        else
        {
            ret = ctc_chip_get_property(g_api_ldev, type, (void*)&cfg_param);
        }
        if (ret < 0)
        {
            ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
            return CLI_ERROR;
        }

        ctc_cli_out("%-34s:  %u\n", "Slew rate value", cfg_param.value);
    }

    index = CTC_CLI_GET_ARGC_INDEX("ffe");
    if (0xFF != index)
    {
        sal_memset(&ffe_param, 0, sizeof(ctc_chip_serdes_ffe_t));
        type = CTC_CHIP_PROP_SERDES_FFE;
        ffe_param.serdes_id = serdes_id;

        index = CTC_CLI_GET_ARGC_INDEX("user-define");
        if (0xFF != index)
        {
            ffe_param.mode = CTC_CHIP_SERDES_FFE_MODE_DEFINE;
        }

        index = CTC_CLI_GET_ARGC_INDEX("3ap");
        if (0xFF != index)
        {
            ffe_param.mode = CTC_CHIP_SERDES_FFE_MODE_3AP;
        }

        index = CTC_CLI_GET_ARGC_INDEX("typical");
        if (0xFF != index)
        {
            ffe_param.mode = CTC_CHIP_SERDES_FFE_MODE_TYPICAL;
        }

        if(g_ctcs_api_en)
        {
             ret = ctcs_chip_get_property(g_api_ldev, type, (void*)&ffe_param);
        }
        else
        {
            ret = ctc_chip_get_property(g_api_ldev, type, (void*)&ffe_param);
        }
        if (ret < 0)
        {
            ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
            return CLI_ERROR;
        }
        sal_memcpy(coefficient, ffe_param.coefficient, sizeof(coefficient));
        for (i = 0; i < CTC_CHIP_FFE_PARAM_NUM; i++)
        {
            ctc_cli_out("%s%-34d:  %d\n", "FFE C",i, coefficient[i]);
        }
        ctc_cli_out("%-39s:  %s\n", "FFE Status",ffe_param.status?"active":"inactive");

    }

    index = CTC_CLI_GET_ARGC_INDEX("loopback");
    if (0xFF != index)
    {
        uint8 local_lp = 0;
        uint8 extern_lp = 0;
        uint8 pcs_lp    = 0;
        sal_memset(&lb_param, 0, sizeof(ctc_chip_serdes_loopback_t));
        type = CTC_CHIP_PROP_SERDES_LOOPBACK;
        lb_param.serdes_id = serdes_id;
        lb_param.mode = 0;

        if(g_ctcs_api_en)
        {
             ret = ctcs_chip_get_property(g_api_ldev, type, (void*)&lb_param);
        }
        else
        {
            ret = ctc_chip_get_property(g_api_ldev, type, (void*)&lb_param);
        }
        if (ret < 0)
        {
            temp = 0xff;
        }
        else
        {
            temp = lb_param.enable;
        }

        lb_param.mode = 1;
        if(g_ctcs_api_en)
        {
             ret = ctcs_chip_get_property(g_api_ldev, type, (void*)&lb_param);
        }
        else
        {
            ret = ctc_chip_get_property(g_api_ldev, type, (void*)&lb_param);
        }
        if (ret < 0)
        {
            extern_lp = 0xff;
        }
        else
        {
            extern_lp = lb_param.enable;
        }

        lb_param.mode = 2;
        if(g_ctcs_api_en)
        {
             ret = ctcs_chip_get_property(g_api_ldev, type, (void*)&lb_param);
        }
        else
        {
            ret = ctc_chip_get_property(g_api_ldev, type, (void*)&lb_param);
        }
        if (ret < 0)
        {
            local_lp = 0xff;
        }
        else
        {
            local_lp = lb_param.enable;
        }

        lb_param.mode = 3;
        if(g_ctcs_api_en)
        {
             ret = ctcs_chip_get_property(g_api_ldev, type, (void*)&lb_param);
        }
        else
        {
            ret = ctc_chip_get_property(g_api_lchip, type, (void*)&lb_param);
        }
        if (ret < 0)
        {
            pcs_lp = 0xff;
        }
        else
        {
            pcs_lp = lb_param.enable;
        }
        ctc_cli_out("%-34s:  %c\n", "Internal Loopback", (0xff==temp)?'-':(temp+'0'));
        ctc_cli_out("%-34s:  %c\n", "External Loopback", (0xff==extern_lp)?'-':(extern_lp+'0'));
        ctc_cli_out("%-34s:  %c\n", "Local Loopback", (0xff==local_lp)?'-':(local_lp+'0'));
        ctc_cli_out("%-34s:  %c\n", "Pcs   Loopback", (0xff==pcs_lp)?'-':(pcs_lp+'0'));
    }

    index = CTC_CLI_GET_ARGC_INDEX("polarity");
    if (0xFF != index)
    {
        sal_memset(&pola_param, 0, sizeof(ctc_chip_serdes_polarity_t));
        type = CTC_CHIP_PEOP_SERDES_POLARITY;
        pola_param.serdes_id = serdes_id;
        pola_param.dir = 0;

        if(g_ctcs_api_en)
        {
             ret = ctcs_chip_get_property(g_api_ldev, type, (void*)&pola_param);
        }
        else
        {
            ret = ctc_chip_get_property(g_api_ldev, type, (void*)&pola_param);
        }
        if (ret < 0)
        {
            ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
            return CLI_ERROR;
        }

        temp = pola_param.polarity_mode;

        pola_param.dir = 1;
        if(g_ctcs_api_en)
        {
             ret = ctcs_chip_get_property(g_api_ldev, type, (void*)&pola_param);
        }
        else
        {
            ret = ctc_chip_get_property(g_api_ldev, type, (void*)&pola_param);
        }
        if (ret < 0)
        {
            ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
            return CLI_ERROR;
        }

        ctc_cli_out("%-34s:  %u\n", "Rx Polarity", temp);
        ctc_cli_out("%-34s:  %u\n", "Tx Polarity", pola_param.polarity_mode);

    }

    index = CTC_CLI_GET_ARGC_INDEX("ctle");
    if (0xFF != index)
    {
        sal_memset(&ctle_param, 0, sizeof(ctc_chip_serdes_ctle_t));
        type = CTC_CHIP_PROP_SERDES_CTLE;
        ctle_param.serdes_id = serdes_id;

        if(g_ctcs_api_en)
        {
             ret = ctcs_chip_get_property(g_api_ldev, type, (void*)&ctle_param);
        }
        else
        {
            ret = ctc_chip_get_property(g_api_ldev, type, (void*)&ctle_param);
        }
        if (ret < 0)
        {
            ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
            return CLI_ERROR;
        }

        ctc_cli_out("%-34s:  %u\n", "Value0", ctle_param.value[0]);
        ctc_cli_out("%-34s:  %u\n", "Value1", ctle_param.value[1]);
        ctc_cli_out("%-34s:  %u\n", "Value2", ctle_param.value[2]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("prbs");
    if (0xFF != index)
    {
        sal_memset(&prbs_param, 0, sizeof(ctc_chip_serdes_prbs_t));
        type = CTC_CHIP_PROP_SERDES_PRBS;
        prbs_param.serdes_id = serdes_id;

        index = CTC_CLI_GET_ARGC_INDEX("rx");
        if (0xFF != index)
        {
            prbs_param.mode = 0;
        }

        index = CTC_CLI_GET_ARGC_INDEX("tx");
        if (0xFF != index)
        {
            prbs_param.mode = 1;
        }

        if(g_ctcs_api_en)
        {
             ret = ctcs_chip_get_property(g_api_ldev, type, (void*)&prbs_param);
        }
        else
        {
            ret = ctc_chip_get_property(g_api_ldev, type, (void*)&prbs_param);
        }
        if (ret < 0)
        {
            ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
            return CLI_ERROR;
        }

        ctc_cli_out("%-34s:  %u\n", "Polynome_type", prbs_param.polynome_type);
        ctc_cli_out("%-34s:  %u\n", "Error_cnt", prbs_param.error_cnt);
    }

    index = CTC_CLI_GET_ARGC_INDEX("eye-diagram");
    if (0xFF != index)
    {
        sal_memset(&eye_param, 0, sizeof(ctc_chip_serdes_eye_diagram_t));
        type = CTC_CHIP_PROP_SERDES_EYE_DIAGRAM;
        eye_param.serdes_id = serdes_id;

        index = CTC_CLI_GET_ARGC_INDEX("total");
        if(0xFF != index)
        {
            eye_param.mode = CTC_CHIP_SERDES_EYE_PLOT;
            eye_param.p_data = (char*)mem_malloc(MEM_CLI_MODULE, CTC_SERDES_EYE_DATA_LEN);
            sal_memset(eye_param.p_data, 0, CTC_SERDES_EYE_DATA_LEN);
        }
        else
        {
            eye_param.mode = CTC_CHIP_SERDES_EYE_OPEN;
            eye_param.p_data = NULL;
        }

        if(g_ctcs_api_en)
        {
             ret = ctcs_chip_get_property(g_api_ldev, type, (void*)&eye_param);
        }
        else
        {
            ret = ctc_chip_get_property(g_api_ldev, type, (void*)&eye_param);
        }
        if (ret < 0)
        {
            ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
            if(NULL != eye_param.p_data)
            {
                mem_free(eye_param.p_data);
            }
            return CLI_ERROR;
        }

        if(CTC_CHIP_SERDES_EYE_PLOT == eye_param.mode)
        {
            ctc_cli_out("%c", '+');
            for(x = 0; x < CTC_SERDES_EYE_DATA_X_SIZE; x++)
            {
                ctc_cli_out("%c", '-');
            }
            ctc_cli_out("%c\n", '+');
            
            for(y = 0; y < CTC_SERDES_EYE_DATA_Y_SIZE; y++)
            {
                ctc_cli_out("%c", '|');
                for(x = 0; x < CTC_SERDES_EYE_DATA_X_SIZE; x++)
                {
                    ctc_cli_out("%c", eye_param.p_data[y*CTC_SERDES_EYE_DATA_X_SIZE + x]);
                }
                ctc_cli_out("%c\n", '|');
            }
            
            ctc_cli_out("%c", '+');
            for(x = 0; x < CTC_SERDES_EYE_DATA_X_SIZE; x++)
            {
                ctc_cli_out("%c", '-');
            }
            ctc_cli_out("%c\n", '+');
        }
        else
        {
            ctc_cli_out("%-34s:  %u\n", "Height", eye_param.height);
            ctc_cli_out("%-34s:  %u\n", "Width", eye_param.width);
        }
        if(NULL != eye_param.p_data)
        {
            mem_free(eye_param.p_data);
        }
    }

    index = CTC_CLI_GET_ARGC_INDEX("dfe");
    if (0xFF != index)
    {
        sal_memset(&cfg_param, 0, sizeof(ctc_chip_serdes_cfg_t));
        type = CTC_CHIP_PROP_SERDES_DFE;
        cfg_param.serdes_id = serdes_id;

        if(g_ctcs_api_en)
        {
             ret = ctcs_chip_get_property(g_api_ldev, type, (void*)&cfg_param);
        }
        else
        {
            ret = ctc_chip_get_property(g_api_ldev, type, (void*)&cfg_param);
        }
        if (ret < 0)
        {
            ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
            return CLI_ERROR;
        }

        ctc_cli_out("%-34s:  %u\n", "DFE", cfg_param.value);
    }

    index = CTC_CLI_GET_ARGC_INDEX("optical-mode");
    if (0xFF != index)
    {
        sal_memset(&cfg_param, 0, sizeof(ctc_chip_serdes_cfg_t));
        type = CTC_CHIP_PROP_SERDES_OPTICAl_MODE;
        cfg_param.serdes_id = serdes_id;

        if(g_ctcs_api_en)
        {
             ret = ctcs_chip_get_property(g_api_ldev, type, (void*)&cfg_param);
        }
        else
        {
            ret = ctc_chip_get_property(g_api_ldev, type, (void*)&cfg_param);
        }
        if (ret < 0)
        {
            ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
            return CLI_ERROR;
        }

        ctc_cli_out("%-34s:  %u\n", "Optical-Mode", cfg_param.value);
    }

    index = CTC_CLI_GET_ARGC_INDEX("direction");
    if (INDEX_VALID(index))
    {
        sal_memset(&cfg_param, 0, sizeof(ctc_chip_serdes_cfg_t));
        index = CTC_CLI_GET_ARGC_INDEX("reset");
        if(INDEX_VALID(index))
        {
            type = CTC_CHIP_PROP_SERDES_RESET;
        }
        else
        {
            type = CTC_CHIP_PROP_SERDES_EN;
        }
        cfg_param.serdes_id = serdes_id;

        index = CTC_CLI_GET_ARGC_INDEX("ingress");
        if (INDEX_VALID(index))
        {
            cfg_param.dir = CTC_INGRESS;
        } 
        index = CTC_CLI_GET_ARGC_INDEX("egress");
        if (INDEX_VALID(index))
        {
            cfg_param.dir = CTC_EGRESS;
        }
        index = CTC_CLI_GET_ARGC_INDEX("both");
        if (INDEX_VALID(index))
        {
            cfg_param.dir = CTC_BOTH_DIRECTION;
        }

        if(g_ctcs_api_en)
        {
             ret = ctcs_chip_get_property(g_api_ldev, type, (void*)&cfg_param);
        }
        else
        {
            ret = ctc_chip_get_property(g_api_ldev, type, (void*)&cfg_param);
        }
        if(ret < 0)
        {
            ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
            return CLI_ERROR;
        }

        if(CTC_CHIP_PROP_SERDES_EN == type)
        {
            ctc_cli_out("%-34s:  %u\n", "Serdes-en", cfg_param.value);
        }
        if(CTC_CHIP_PROP_SERDES_RESET == type)
        {
            ctc_cli_out("%-34s:  %u\n", "Serdes-reset", cfg_param.value);
        }
    }

    return ret;

}

CTC_CLI(ctc_cli_datapath_debug_on,
        ctc_cli_datapath_debug_on_cmd,
        "debug datapath (ctc|sys) (debug-level {func|param|info|error} |)",
        CTC_CLI_DEBUG_STR,
        "Datapath module",
        "CTC layer",
        "Sys layer",
        CTC_CLI_DEBUG_LEVEL_STR,
        CTC_CLI_DEBUG_LEVEL_FUNC,
        CTC_CLI_DEBUG_LEVEL_PARAM,
        CTC_CLI_DEBUG_LEVEL_INFO,
        CTC_CLI_DEBUG_LEVEL_ERROR)
{

    uint32 typeenum = 0;
    uint8 level = CTC_DEBUG_LEVEL_INFO | CTC_DEBUG_LEVEL_FUNC | CTC_DEBUG_LEVEL_PARAM | CTC_DEBUG_LEVEL_ERROR;
    uint8 index = 0;

    index = CTC_CLI_GET_ARGC_INDEX("debug-level");
    if (index != 0xFF)
    {
        level = CTC_DEBUG_LEVEL_NONE;
        index = CTC_CLI_GET_ARGC_INDEX("func");
        if (index != 0xFF)
        {
            level |= CTC_DEBUG_LEVEL_FUNC;
        }

        index = CTC_CLI_GET_ARGC_INDEX("param");
        if (index != 0xFF)
        {
            level |= CTC_DEBUG_LEVEL_PARAM;
        }

        index = CTC_CLI_GET_ARGC_INDEX("info");
        if (index != 0xFF)
        {
            level |= CTC_DEBUG_LEVEL_INFO;
        }

        index = CTC_CLI_GET_ARGC_INDEX("error");
        if (index != 0xFF)
        {
            level |= CTC_DEBUG_LEVEL_ERROR;
        }
    }

    if (0 == sal_memcmp(argv[0], "ctc", 3))
    {
        typeenum = DATAPATH_CTC;

    }
    else
    {
        typeenum = DATAPATH_SYS;

    }

    ctc_debug_set_flag("datapath", "datapath", typeenum, level, TRUE);
    return CLI_SUCCESS;
}


CTC_CLI(ctc_cli_datapath_debug_off,
        ctc_cli_datapath_debug_off_cmd,
        "no debug datapath (ctc | sys)",
        CTC_CLI_NO_STR,
        CTC_CLI_DEBUG_STR,
        "Datapath Module",
        "Ctc layer",
        "Sys layer")
{
    uint32 typeenum = 0;
    uint8 level = 0;

    if (0 == sal_memcmp(argv[0], "ctc", 3))
    {
        typeenum = DATAPATH_CTC;
    }
    else if (0 == sal_memcmp(argv[0], "sys", 3))
    {
        typeenum = DATAPATH_SYS;
    }

    ctc_debug_set_flag("datapath", "datapath", typeenum, level, FALSE);

    return CLI_SUCCESS;
}


CTC_CLI(ctc_cli_datapath_show_debug,
        ctc_cli_datapath_show_debug_cmd,
        "show debug datapath (ctc | sys)",
        CTC_CLI_SHOW_STR,
        CTC_CLI_DEBUG_STR,
        "Datapath Module",
        "Ctc layer",
        "Sys layer")
{
    uint32 typeenum = 0;
    uint8 level = 0;
    uint8 en = 0;

    if (0 == sal_memcmp(argv[0], "ctc", 3))
    {
        typeenum = DATAPATH_CTC;
    }
    else if (0 == sal_memcmp(argv[0], "sys", 3))
    {
        typeenum = DATAPATH_SYS;
    }

    en = ctc_debug_get_flag("datapath", "datapath", typeenum, &level);
    ctc_cli_out("chip:%s debug %s level:%s\n", argv[0],
                en ? "on" : "off", ctc_cli_get_debug_desc(level));

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_chip_mdio_read,
            ctc_cli_chip_mdio_read_cmd,
            "chip read mdio lchip ID (ge | xg (dev-addr ADDR)) (control-id ID |) (bus-id ID \
            phy-id ID reg-addr ADDR)",
            "Chip module",
            "Read operate",
            "Mdio",
            "Local chip id",
            "Mdio bus ID",
            "1GPHY",
            "XGPHY",
            "Dev-addr",
            "ADDR",
            "Control id",
            "<0 - 1>",
            "Bus id",
            "MDIO bus ID",
            "Phy number",
            "ID",
            "Register address",
            "ADDR")
{
    int32 ret = 0;
	uint8 lchip = 0;
    uint8 index = 0xFF;
    ctc_chip_mdio_type_t type = CTC_CHIP_MDIO_GE;
    ctc_chip_mdio_para_t mdio_para = {0};

    CTC_CLI_GET_UINT8_RANGE("lchip", lchip, argv[0], 0, CTC_MAX_UINT8_VALUE);
    index = CTC_CLI_GET_ARGC_INDEX("ge");
    if (0xFF != index)
    {
        type = CTC_CHIP_MDIO_GE;
    }

    index = CTC_CLI_GET_ARGC_INDEX("xg");
    if (0xFF != index)
    {
        type = CTC_CHIP_MDIO_XG;
    }

    index = CTC_CLI_GET_ARGC_INDEX("control-id");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT8("control-id", mdio_para.ctl_id, argv[index + 1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("bus-id");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT8("bus-id", mdio_para.bus, argv[index + 1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("phy-id");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT8("phy-id", mdio_para.phy_addr, argv[index + 1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("reg-addr");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT16("reg-addr", mdio_para.reg, argv[index + 1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("dev-addr");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT16("dev-addr", mdio_para.dev_no, argv[index + 1]);
    }

    if(g_ctcs_api_en)
    {
        ret = ctcs_chip_mdio_read(g_api_ldev, type,  &mdio_para);
    }
    else
    {
        ret = ctc_chip_mdio_read(g_api_ldev, type,  &mdio_para);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    if(CTC_CHIP_MDIO_XG == type)
        ctc_cli_out("PHY addr: 0x%x\tdevno: 0x%x\treg: 0x%x\tvalue: 0x%x\n", mdio_para.phy_addr, mdio_para.dev_no,mdio_para.reg,mdio_para.value);
    else if(CTC_CHIP_MDIO_GE == type)
        ctc_cli_out("PHY addr: 0x%x\treg: 0x%x\tvalue: 0x%x\n", mdio_para.phy_addr,mdio_para.reg, mdio_para.value);

    return CLI_SUCCESS;
}


CTC_CLI(ctc_cli_chip_mdio_write,
            ctc_cli_chip_mdio_write_cmd,
            "chip write mdio lchip ID (ge | xg (dev-addr ADDR)) (control-id ID |) (bus-id ID \
            phy-id ID reg-addr ADDR value VAL)",
            "Chip module",
            "Read operate",
            "Mdio",
            "Local chip id",
            "ID",
            "1GPHY",
            "XGPHY",
            "Dev-addr",
            "ADDR",
            "Control id",
            "<0 - 1>",
            "Bus id",
            "<0 - 1>",
            "Phy number",
            "ID",
            "Register address",
            "ADDR",
            "Value",
            "VALUE")
{
    int32 ret = 0;
    
    uint8 index = 0xFF;
    ctc_chip_mdio_type_t type = CTC_CHIP_MDIO_GE;
    ctc_chip_mdio_para_t mdio_para = {0};
    uint8 lchip = 0;
    CTC_CLI_GET_UINT8_RANGE("lchip", lchip, argv[0], 0, CTC_MAX_UINT8_VALUE);
    index = CTC_CLI_GET_ARGC_INDEX("ge");
    if (0xFF != index)
    {
        type = CTC_CHIP_MDIO_GE;
    }

    index = CTC_CLI_GET_ARGC_INDEX("xg");
    if (0xFF != index)
    {
        type = CTC_CHIP_MDIO_XG;
    }

    index = CTC_CLI_GET_ARGC_INDEX("control-id");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT8("control-id", mdio_para.ctl_id, argv[index + 1]);
    }
    
    index = CTC_CLI_GET_ARGC_INDEX("bus-id");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT8("bus-id", mdio_para.bus, argv[index + 1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("phy-id");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT8("phy-id", mdio_para.phy_addr, argv[index + 1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("reg-addr");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT16("reg-addr", mdio_para.reg, argv[index + 1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("dev-addr");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT16("dev-addr", mdio_para.dev_no, argv[index + 1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("value");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT16("value", mdio_para.value, argv[index + 1]);
    }

    if(g_ctcs_api_en)
    {
        ret = ctcs_chip_mdio_write(g_api_ldev, type,  &mdio_para);
    }
    else
    {
        ret = ctc_chip_mdio_write(g_api_ldev, type,  &mdio_para);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_chip_show_device_info,
        ctc_cli_chip_show_device_info_cmd,
        "show chip device information  ",
        CTC_CLI_SHOW_STR,
        "Chip module",
        "Device",
        "Information")
{
    ctc_chip_device_info_t device_info;
    int32 ret = 0;
    sal_memset(&device_info, 0, sizeof(device_info));



    if(g_ctcs_api_en)
    {
         ret = ctcs_chip_get_property(g_api_ldev, CTC_CHIP_PROP_DEVICE_INFO, (void*)&device_info);
    }
    else
    {
        ret = ctc_chip_get_property(g_api_ldev, CTC_CHIP_PROP_DEVICE_INFO, (void*)&device_info);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }
    ctc_cli_out("Chip name: %s, Device Id: %d, Version Id: %d \n", device_info.chip_name, device_info.device_id, device_info.version_id);

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_chip_show_gport_property_prop,
        ctc_cli_chip_show_gport_property_prop_cmd,
        "show chip property serdes-to-gport SERDES",
        "Show operate",
        "Chip module",
        "Property",
        "Serdes id to gport",
        "Serdes Id Value")
{
    ctc_port_serdes_info_t serdes_port;
    
    int32 ret = 0;
    char* serdes_mode_name[CTC_CHIP_MAX_SERDES_MODE] = {"NONE", "XFI", "SGMII", "XSGMII", "QSGMII", "XAUI", "DXAUI", "XLG",\
            "CG", "2DOT5G", "USXGMII0", "USXGMII1", "USXGMII2", "XXVG", "LG"};

    sal_memset(&serdes_port, 0, sizeof(ctc_port_serdes_info_t));

    CTC_CLI_GET_UINT16_RANGE("serdes-to-gport", serdes_port.serdes_id,  argv[0], 0, CTC_MAX_UINT16_VALUE);

    ctc_cli_out("Show Serdes                        :  0x%04x\n", serdes_port.serdes_id);
    ctc_cli_out("-------------------------------------------\n");

    if(g_ctcs_api_en)
    {
         ret = ctcs_chip_get_property(g_api_ldev, CTC_CHIP_PROP_SERDES_ID_TO_GPORT, (void*)&serdes_port);
    }
    else
    {
        ret = ctc_chip_get_property(g_api_ldev, CTC_CHIP_PROP_SERDES_ID_TO_GPORT, (void*)&serdes_port);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }
    ctc_cli_out("%-34s:  0x%04x\n", "Gport", serdes_port.gport);
    ctc_cli_out("%-34s:  %s\n", "serdes mode", serdes_mode_name[serdes_port.serdes_mode]);
    ctc_cli_out("%-34s:  %u\n", "overclocking", serdes_port.overclocking_speed);
    ctc_cli_out("%-34s:  %u\n", "ready", serdes_port.ready);
    ctc_cli_out("%-34s:  %u\n", "signal detect", serdes_port.signal_detect);

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_chip_show_global_panel_ports,
        ctc_cli_chip_show_global_panel_ports_cmd,
        "show chip global-cfg panel-ports ",
        "Show",
        "Chip module",
        "Global config",
        "Panel ports")
{
    int32 ret = CLI_SUCCESS;
    uint16 loop = 0;
    uint32 gport = 0;
    uint8 gchip = 0;
    ctc_global_panel_ports_t panel_ports;
    uint8 lchip = 0;
    sal_memset(&panel_ports, 0, sizeof(panel_ports));



    lchip = g_api_ldev;
    panel_ports.lchip = lchip;

    if(g_ctcs_api_en)
    {
        ret = ctcs_global_ctl_get(g_api_ldev, CTC_GLOBAL_PANEL_PORTS, &panel_ports);
    }
    else
    {
        ret = ctc_global_ctl_get(CTC_GLOBAL_PANEL_PORTS, &panel_ports);
    }

    if (ret >= 0 )
    {
        if (g_ctcs_api_en)
        {
            ret = ctcs_get_gchip_id(g_api_ldev, &gchip);
        }
        else
        {
            ret = ctc_get_gchip_id(g_api_ldev, &gchip);
        }
        ctc_cli_out("%-34s:  %u\n", "Phy Ports", panel_ports.count);
        for (loop = 0; loop < panel_ports.count; loop++ )
        {
            gport = CTC_MAP_LPORT_TO_GPORT(gchip, panel_ports.lport[loop]);
            ctc_cli_out("%-2d:  0x%x\n", loop, gport);
        }
    }

    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;

}


CTC_CLI(ctc_cli_chip_mem_bist,
        ctc_cli_chip_mem_bist_cmd,
        "chip mem-bist enable ",
        "Chip module",
        "Memory bist",
        "Enable")
{
    int32  ret    = CLI_SUCCESS;
    ctc_chip_mem_bist_t mem_bist;

    sal_memset(&mem_bist, 0, sizeof(ctc_chip_mem_bist_t));


    if (g_ctcs_api_en)
    {
        ret = ctcs_chip_set_property(g_api_ldev, CTC_CHIP_PROP_MEM_BIST, (void*)&mem_bist);
    }
    else
    {
        ret = ctc_chip_set_property(g_api_ldev, CTC_CHIP_PROP_MEM_BIST, (void*)&mem_bist);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    if (mem_bist.status == 0)
    {
        ctc_cli_out("Memory BIST PASS\n");
    }
    else
    {
        ctc_cli_out("Memory BIST FAIL\n");
    }

    return ret;

}
CTC_CLI(ctc_cli_chip_cpu_port_en,
        ctc_cli_chip_cpu_port_en_cmd,
        "chip cpu-port GPORT mac-da DA mac-sa SA tpid TPID vlan-id VLANID",
        "Chip module",
        "Network to cpu",
        "Gport",
        "Mac da",
        CTC_CLI_MAC_FORMAT,
        "Mac sa",
        CTC_CLI_MAC_FORMAT,
        "Tpid",
        "TPID",
        "Vlan id",
        "VLAN ID")
{
    int32  ret    = CLI_SUCCESS;
    
    ctc_chip_cpu_port_t cpu_port;

    sal_memset(&cpu_port, 0, sizeof(cpu_port));

    CTC_CLI_GET_UINT32("gport", cpu_port.gport, argv[0]);
    CTC_CLI_GET_MAC_ADDRESS("mac address", cpu_port.cpu_mac_da, argv[1]);
    CTC_CLI_GET_MAC_ADDRESS("mac address", cpu_port.cpu_mac_sa, argv[2]);
    CTC_CLI_GET_UINT16("tpid", cpu_port.tpid, argv[3]);
    CTC_CLI_GET_UINT16("vlan id", cpu_port.vlanid, argv[4]);

    if (g_ctcs_api_en)
    {
        ret = ctcs_chip_set_property(g_api_ldev, CTC_CHIP_PROP_CPU_PORT_EN, (void*)&cpu_port);
    }
    else
    {
        ret = ctc_chip_set_property(g_api_ldev, CTC_CHIP_PROP_CPU_PORT_EN, (void*)&cpu_port);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;
}
CTC_CLI(ctc_cli_chip_show_cpu_port_en_cfg,
ctc_cli_chip_show_cpu_port_en_cfg_cmd,
        "show chip cpu-port GPORT ",
        "Show",
        "Chip module",
        "Network to cpu or CPUMAC port",
        "Gport")
{
    int32 ret = CLI_SUCCESS;
    ctc_chip_cpu_port_t cpu_port;

    CTC_CLI_GET_UINT32("gport", cpu_port.gport, argv[0]);

    if (g_ctcs_api_en)
    {
        ret = ctcs_chip_get_property(g_api_ldev, CTC_CHIP_PROP_CPU_PORT_EN, (void*)&cpu_port);
    }
    else
    {
        ret = ctc_chip_get_property(g_api_ldev, CTC_CHIP_PROP_CPU_PORT_EN, (void*)&cpu_port);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("gport        :0x%x\n", cpu_port.gport);
    ctc_cli_out("tpid         :0x%x\n", cpu_port.tpid);
    ctc_cli_out("vlanid       :%u\n", cpu_port.vlanid);
    ctc_cli_out("%-13s:%.2x%.2x.%.2x%.2x.%.2x%.2x\n","cpu_mac_sa", cpu_port.cpu_mac_sa[0], cpu_port.cpu_mac_sa[1], cpu_port.cpu_mac_sa[2] \
                                                                 , cpu_port.cpu_mac_sa[3], cpu_port.cpu_mac_sa[4], cpu_port.cpu_mac_sa[5]);
    ctc_cli_out("%-13s:%.2x%.2x.%.2x%.2x.%.2x%.2x\n","cpu_mac_da", cpu_port.cpu_mac_da[0], cpu_port.cpu_mac_da[1], cpu_port.cpu_mac_da[2] \
                                                                 , cpu_port.cpu_mac_da[3], cpu_port.cpu_mac_da[4], cpu_port.cpu_mac_da[5]);

    return ret;
}
#define CTC_CLI_CHIP_MON_TEMPERATURE 0x01
#define CTC_CLI_CHIP_MON_VOLTAGE     0x02
#define CTC_CLI_CHIP_MON_MAC_ERR     0x04

#define CTC_CLI_CHIP_MON_MAX_HIS     128
#define CTC_CLI_CHIP_MON_CYCLE       1*60*1000

enum ctc_cli_chip_mon_event_e
{
    CTC_CLI_CHIP_MON_EVT_NONE,
    CTC_CLI_CHIP_MON_EVT_TEMPERATURE_HIGH,
    CTC_CLI_CHIP_MON_EVT_TEMPERATURE_LOW,
    CTC_CLI_CHIP_MON_EVT_TEMPERATURE_BACK_TO_NORMAL,
    CTC_CLI_CHIP_MON_EVT_VOLT_HIGH,
    CTC_CLI_CHIP_MON_EVT_VOLT_LOW,
    CTC_CLI_CHIP_MON_EVT_VOLT_BACK_TO_NORMAL,
    CTC_CLI_CHIP_MON_EVT_RX_FCS_ERR,
    CTC_CLI_CHIP_MON_EVT_RX_MAC_OVERRUN,
    CTC_CLI_CHIP_MON_EVT_RX_BAD_63,
    CTC_CLI_CHIP_MON_EVT_RX_BAD_JUMBO,
    CTC_CLI_CHIP_MON_EVT_TX_FCS_ERR,
    CTC_CLI_CHIP_MON_EVT_TX_MAC_UNDERRUN,
    CTC_CLI_CHIP_MON_EVT_MAX
};
typedef enum ctc_cli_chip_mon_event_e ctc_cli_chip_mon_event_t;

struct ctc_cli_chip_monitor_record_s
{
    uint8  valid;
    int32  temprature;
    int32  voltage;
    ctc_mac_stats_t *mac_rx;
    ctc_mac_stats_t *mac_tx;
};
typedef struct ctc_cli_chip_monitor_record_s ctc_cli_chip_monitor_record_t;

struct ctc_cli_chip_monitor_event_s
{
    uint8 evt;
    sal_time_t timestamp;
    uint32 gport;
    union
    {
        int32 temp_value;
        int32 volt_value;
        uint64 stats_value;
    }from;
    union
    {
        int32 temp_value;
        int32 volt_value;
        uint64 stats_value;
    }to;
};
typedef struct ctc_cli_chip_monitor_event_s ctc_cli_chip_monitor_event_t;

struct ctc_chip_monitor_s
{
    uint8  task_bmp;
    uint32 cycle;
    int32  temprature_high;
    int32  temprature_low;
    int32  voltage_high;
    int32  voltage_low;
    sal_task_t* task;
    sal_mutex_t* mutex;
    ctc_cli_chip_monitor_record_t last_record;
    ctc_cli_chip_monitor_event_t evt[CTC_CLI_CHIP_MON_MAX_HIS];
    uint16 cur_evt_idx;
};
typedef struct ctc_chip_monitor_s ctc_chip_monitor_t;

#define g_chip_monitor_master   ((ctc_chip_monitor_t**)CTC_VTY_CLIENT(vty)->chip_monitor_master)

#define CTC_CLI_CHIP_MON_CHECK_INIT(_lchip_)   \
    do { \
        if (_lchip_ >= CTC_MAX_LOCAL_DEV_NUM)\
        {\
            return CLI_ERROR;\
        }\
        if (!g_chip_monitor_master[_lchip_])  \
        {  \
            uint32 _dev_id_ = 0;  \
            uint32 _capability_[CTC_GLOBAL_CAPABILITY_MAX] = {0};  \
            uint32 _max_port_num_per_chip_ = 0;  \
            if (_lchip_ >= CTC_MAX_LOCAL_DEV_NUM) \
            { \
                return CLI_ERROR; \
            } \
            g_chip_monitor_master[_lchip_] = (ctc_chip_monitor_t*)mem_malloc(MEM_CLI_MODULE, sizeof(ctc_chip_monitor_t)); \
            if (!g_chip_monitor_master[_lchip_]) \
            {  \
                ctc_cli_out("%% ret = %d, %s \n", CTC_E_NO_MEMORY, ctc_get_error_desc(CTC_E_NO_MEMORY));  \
                return CLI_ERROR;  \
            }  \
            sal_memset(g_chip_monitor_master[_lchip_], 0, sizeof(ctc_chip_monitor_t));  \
            if(g_ctcs_api_en)  \
            {  \
                ctcs_global_ctl_get(g_api_ldev, CTC_GLOBAL_CHIP_CAPABILITY, _capability_);  \
            }  \
            else  \
            {  \
                ctc_global_ctl_get(CTC_GLOBAL_CHIP_CAPABILITY, _capability_);  \
            }  \
            _max_port_num_per_chip_ = _capability_[CTC_GLOBAL_CAPABILITY_MAX_PORT_NUM];  \
            g_chip_monitor_master[_lchip_]->last_record.mac_rx = (ctc_mac_stats_t*)mem_malloc(MEM_CLI_MODULE, _max_port_num_per_chip_*sizeof(ctc_mac_stats_t));  \
            if (!g_chip_monitor_master[_lchip_]->last_record.mac_rx) \
            {  \
                mem_free(g_chip_monitor_master[_lchip_]);  \
                g_chip_monitor_master[_lchip_] = NULL; \
                ctc_cli_out("%% ret = %d, %s \n", CTC_E_NO_MEMORY, ctc_get_error_desc(CTC_E_NO_MEMORY));  \
                return CLI_ERROR;  \
            }  \
            sal_memset(g_chip_monitor_master[_lchip_]->last_record.mac_rx, 0, _max_port_num_per_chip_*sizeof(ctc_mac_stats_t));  \
            g_chip_monitor_master[_lchip_]->last_record.mac_tx = (ctc_mac_stats_t*)mem_malloc(MEM_CLI_MODULE, _max_port_num_per_chip_*sizeof(ctc_mac_stats_t));  \
            if (!g_chip_monitor_master[_lchip_]->last_record.mac_tx) \
            {  \
                mem_free(g_chip_monitor_master[_lchip_]->last_record.mac_rx);  \
                mem_free(g_chip_monitor_master[_lchip_]);  \
                g_chip_monitor_master[_lchip_] = NULL; \
                ctc_cli_out("%% ret = %d, %s \n", CTC_E_NO_MEMORY, ctc_get_error_desc(CTC_E_NO_MEMORY));  \
                return CLI_ERROR;  \
            }  \
            sal_memset(g_chip_monitor_master[_lchip_]->last_record.mac_tx, 0, _max_port_num_per_chip_*sizeof(ctc_mac_stats_t));  \
            dal_get_chip_dev_id(CTC_MAP_LDEV(_lchip_), &_dev_id_);  \
            g_chip_monitor_master[_lchip_]->cycle = CTC_CLI_CHIP_MON_CYCLE;  \
            if(!_dev_id_)  \
            {  \
                return CLI_ERROR;  \
            }  \
            g_chip_monitor_master[_lchip_]->temprature_high = 125;  \
            g_chip_monitor_master[_lchip_]->temprature_low = -55;  \
            g_chip_monitor_master[_lchip_]->voltage_high = 1100;  \
            g_chip_monitor_master[_lchip_]->voltage_low = -400;  \
            sal_mutex_create(&(g_chip_monitor_master[_lchip_]->mutex));  \
        }  \
    } while (0)

#define CTC_CLI_CHIP_MON_LOCK()   \
    do { \
        if (g_chip_monitor_master[lchip]->mutex) sal_mutex_lock(g_chip_monitor_master[lchip]->mutex); \
    } while (0)

#define CTC_CLI_CHIP_MON_UNLOCK() \
    do { \
        if (g_chip_monitor_master[lchip]->mutex) sal_mutex_unlock(g_chip_monitor_master[lchip]->mutex); \
    } while (0)

#define CTC_CLI_CHIP_XPIPE_KEY_FIELD_NUM 11
#define CTC_CLI_CHIP_XPIPE_KEY_ARG_CHECK(arg_cnt,arg_num,p_field) \
        arg_cnt++; \
        if (p_field && arg_cnt < arg_num) p_field++;\
        if(arg_cnt > arg_num) return CTC_E_INTR_INVALID_PARAM;

#define CTC_CLI_CHIP_XPIPE_KEY_FIELD_STR "\
| mac-da (VALUE (MASK|)|) \
| macda-hit (VALUE (MASK|)|) \
| pi-stag-valid (VALUE (MASK|)|) \
| svlan-id (VALUE (MASK|)|) \
| stag-cos (VALUE (MASK|)|) \
| ether-type (VALUE (MASK|)|) \
| is-ip-pkt (VALUE (MASK|)|) \
| ip-dscp (VALUE (MASK|)|) \
| ip-protocol (VALUE (MASK|)|) \
| udf (VALUE (MASK|)|) \
| gport VALUE \
"

#define CTC_CLI_CHIP_XPIPE_KEY_FIELD_DESC \
"destination mac address ", "value", "mask",\
"mac-da lookup hit ", "value", "mask",\
"s-vlan exist ", "value", "mask",\
"s-vlan id ", "value", "mask",\
"stag cos ", "value", "mask",\
"ether type ", "value", "mask",\
"is ipv4 or ipv6 packet", "value", "mask", \
"dscp ", "value", "mask",\
"ip protocol ", "value", "mask",\
"udf","value","mask",\
"gport","value"

#define CTC_CLI_CHIP_XPIPE_KEY_FIELD_SET(key_field, arg)\
do{\
    index = CTC_CLI_GET_ARGC_INDEX("mac-da");\
    if (0xFF != index) \
    {\
        key_field->type = CTC_FIELD_KEY_MAC_DA;\
        CTC_CLI_GET_MAC_ADDRESS("mac-da", mac_da_addr, argv[index + 1]);\
        key_field->ext_data = mac_da_addr; \
        sal_memset(&mac_da_addr_mask, 0xFF, sizeof(mac_addr_t));\
        if(index+2<argc){\
        CTC_CLI_GET_MAC_ADDRESS("mac-da-mask", mac_da_addr_mask, argv[index + 2])};\
        key_field->ext_mask = mac_da_addr_mask; \
        arg;\
    }\
    index = CTC_CLI_GET_ARGC_INDEX("macda-hit");\
    if (0xFF != index) \
    {\
        key_field->type = CTC_FIELD_KEY_MACDA_HIT;\
        CTC_CLI_GET_UINT32("value", key_field->data, argv[index + 1]);\
        if(index+2<argc) CTC_CLI_GET_UINT32("mask", key_field->mask, argv[index + 2]);\
        arg;\
    }\
    index = CTC_CLI_GET_ARGC_INDEX("pi-stag-valid");\
    if (0xFF != index) \
    {\
        key_field->type = CTC_FIELD_KEY_PKT_STAG_VALID;\
        CTC_CLI_GET_UINT32("value", key_field->data, argv[index + 1]);\
        if(index+2<argc) CTC_CLI_GET_UINT32("mask", key_field->mask, argv[index + 2]);\
        arg;\
    }\
    index = CTC_CLI_GET_ARGC_INDEX("svlan-id");\
    if (0xFF != index) \
    {\
        key_field->type = CTC_FIELD_KEY_SVLAN_ID;\
        CTC_CLI_GET_UINT32("value", key_field->data, argv[index + 1]);\
        if (index+2<argc) CTC_CLI_GET_UINT32("mask", key_field->mask, argv[index + 2]); \
        arg;\
    }\
    index = CTC_CLI_GET_ARGC_INDEX("stag-cos");\
    if (0xFF != index) \
    {\
        key_field->type = CTC_FIELD_KEY_STAG_COS;\
        CTC_CLI_GET_UINT32("value", key_field->data, argv[index + 1]);\
        if(index+2<argc) CTC_CLI_GET_UINT32("mask", key_field->mask, argv[index + 2]);\
        arg;\
    }\
    index = CTC_CLI_GET_ARGC_INDEX("ether-type");\
    if (0xFF != index) \
    {\
        key_field->type = CTC_FIELD_KEY_ETHER_TYPE;\
        CTC_CLI_GET_UINT32("value", key_field->data, argv[index + 1]);\
        if(index+2<argc) CTC_CLI_GET_UINT32("mask", key_field->mask, argv[index + 2]);\
        arg;\
    }\
    index = CTC_CLI_GET_ARGC_INDEX("is-ip-pkt");\
    if (0xFF != index) \
    {\
        key_field->type = CTC_FIELD_KEY_IS_IP_PKT;\
        CTC_CLI_GET_UINT32("value", key_field->data, argv[index + 1]);\
        if(index+2<argc) CTC_CLI_GET_UINT32("mask", key_field->mask, argv[index + 2]);\
        arg;\
    }\
    index = CTC_CLI_GET_ARGC_INDEX("ip-dscp");\
    if (0xFF != index) \
    {\
        key_field->type = CTC_FIELD_KEY_IP_DSCP;\
        CTC_CLI_GET_UINT32("value", key_field->data, argv[index + 1]);\
        if(index+2<argc) CTC_CLI_GET_UINT32("mask", key_field->mask, argv[index + 2]);\
        arg;\
    }\
    index = CTC_CLI_GET_ARGC_INDEX("ip-protocol");\
    if (0xFF != index) \
    {\
        key_field->type = CTC_FIELD_KEY_IP_PROTOCOL;\
        CTC_CLI_GET_UINT32("value", key_field->data, argv[index + 1]);\
        if(index+2<argc) CTC_CLI_GET_UINT32("mask", key_field->mask, argv[index + 2]);\
        arg;\
    }\
    index = CTC_CLI_GET_ARGC_INDEX("udf");\
    if (0xFF != index) \
    {\
        key_field->type = CTC_FIELD_KEY_UDF;\
        CTC_CLI_GET_UINT32("value", key_field->data, argv[index + 1]);\
        if(index+2<argc) CTC_CLI_GET_UINT32("mask", key_field->mask, argv[index + 2]);\
        arg;\
    }\
    index = CTC_CLI_GET_ARGC_INDEX("gport");\
    if (0xFF != index) \
    {\
        key_field->type = CTC_FIELD_KEY_PORT;\
        CTC_CLI_GET_UINT32("value", key_field->data, argv[index + 1]);\
        arg;\
    }\
}while(0)
STATIC char*
ctc_cli_chip_get_type(uint8 key_type)
{
    switch (key_type)
    {
        case CTC_FIELD_KEY_MAC_DA:
            return "MAC-DA";
        case CTC_FIELD_KEY_MACDA_HIT:
            return "MACDA-HIT";
        case CTC_FIELD_KEY_PKT_STAG_VALID:
            return "PKT-STAG-VALID";
        case CTC_FIELD_KEY_SVLAN_ID:
            return "SVLAN-ID";
        case CTC_FIELD_KEY_STAG_COS:
            return "STAG-COS";
        case CTC_FIELD_KEY_ETHER_TYPE:
            return "ETHER-TYPE";
        case CTC_FIELD_KEY_IS_IP_PKT:
            return "IS-IP-PKT";
        case CTC_FIELD_KEY_IP_DSCP:
            return "IP-DSCP";
        case CTC_FIELD_KEY_IP_PROTOCOL:
            return "IP-PROTOCOL";
        case CTC_FIELD_KEY_UDF:
            return "UDF";
        default:
            return "XXXXXX";
    }
}

void
ctc_cli_chip_mon_task(void* user_param)
{
    int32 ret = 0;
    uint32 value = 0;
    int32 temp = 0;
    int32 volt = 0;
    uintptr* argv = (uintptr*)(user_param);
    uint8 lchip = (uint8)(argv[0]);
    sal_task_t* task = NULL;
    uint8 gchip = 0;
    uint32 max_port_num_per_chip = 0;
    uint32* capability = NULL;
    uint32 lport = 0;
    uint32 gport = 0;
    ctc_mac_stats_t stats;
    ctc_stats_mac_rec_t* last_rx = NULL;
    ctc_stats_mac_rec_t* cur_rx = NULL;
    ctc_stats_mac_snd_t* last_tx = NULL;
    ctc_stats_mac_snd_t* cur_tx = NULL;
    ctc_cli_chip_monitor_event_t* evt = NULL;
    ctc_vti_t* vty = (ctc_vti_t*)(argv[2]);

    if(NULL == (capability=(uint32*)mem_malloc(MEM_CLI_MODULE, CTC_GLOBAL_CAPABILITY_MAX*sizeof(uint32))))
    {
        return;
    }
    lchip = g_api_ldev;
    if(g_ctcs_api_en)
    {
        ctcs_global_ctl_get(g_api_ldev, CTC_GLOBAL_CHIP_CAPABILITY, capability);
    }
    else
    {
        ctc_global_ctl_get(CTC_GLOBAL_CHIP_CAPABILITY, capability);
    }
    max_port_num_per_chip = capability[CTC_GLOBAL_CAPABILITY_MAX_PORT_NUM];
    mem_free(capability);

    if(g_ctcs_api_en)
    {
   	    ret = ctcs_get_gchip_id(g_api_ldev, &gchip);
    }
    else
    {
	    ret = ctc_get_gchip_id(g_api_ldev, &gchip);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% ret = %d, %s \n", ret, ctc_get_error_desc(ret));
        return;
    }
    while(TRUE)
    {
        CTC_CLI_CHIP_MON_LOCK();

        if (!g_chip_monitor_master[lchip]->task_bmp)
        {
            CTC_CLI_CHIP_MON_UNLOCK();
            break;
        }

        if (CTC_FLAG_ISSET(g_chip_monitor_master[lchip]->task_bmp, CTC_CLI_CHIP_MON_TEMPERATURE))
        {
            if(g_ctcs_api_en)
   	        {
                ret = ctcs_get_chip_sensor(g_api_ldev, CTC_CHIP_SENSOR_TEMP, &value);
            }
            else
            {
                ret = ctc_get_chip_sensor(g_api_ldev, CTC_CHIP_SENSOR_TEMP, &value);
            }
            if (!ret)
            {
                if (value & 0x80000000)
                {
                    temp = 0-(int32)(value&0x7FFFFFFF);
                }
                else
                {
                    temp = value;
                }
                if (temp >= g_chip_monitor_master[lchip]->temprature_high)
                {
                    evt = &(g_chip_monitor_master[lchip]->evt[g_chip_monitor_master[lchip]->cur_evt_idx++]);
                    evt->evt = CTC_CLI_CHIP_MON_EVT_TEMPERATURE_HIGH;
                    sal_time(&(evt->timestamp));
                    evt->from.temp_value = g_chip_monitor_master[lchip]->last_record.temprature;
                    evt->to.temp_value = temp;
                    g_chip_monitor_master[lchip]->cur_evt_idx =
                        ((g_chip_monitor_master[lchip]->cur_evt_idx<CTC_CLI_CHIP_MON_MAX_HIS) ? g_chip_monitor_master[lchip]->cur_evt_idx: 0);
                }
                else if (temp <= g_chip_monitor_master[lchip]->temprature_low)
                {
                    evt = &(g_chip_monitor_master[lchip]->evt[g_chip_monitor_master[lchip]->cur_evt_idx++]);
                    evt->evt = CTC_CLI_CHIP_MON_EVT_TEMPERATURE_LOW;
                    sal_time(&(evt->timestamp));
                    evt->from.temp_value = g_chip_monitor_master[lchip]->last_record.temprature;
                    evt->to.temp_value = temp;
                    g_chip_monitor_master[lchip]->cur_evt_idx =
                        ((g_chip_monitor_master[lchip]->cur_evt_idx<CTC_CLI_CHIP_MON_MAX_HIS) ? g_chip_monitor_master[lchip]->cur_evt_idx: 0);
                }
                else if ((g_chip_monitor_master[lchip]->last_record.valid & CTC_CLI_CHIP_MON_TEMPERATURE) &&
                         ((g_chip_monitor_master[lchip]->last_record.temprature >= g_chip_monitor_master[lchip]->temprature_high) ||
                         (g_chip_monitor_master[lchip]->last_record.temprature <= g_chip_monitor_master[lchip]->temprature_low)))
                {
                    evt = &(g_chip_monitor_master[lchip]->evt[g_chip_monitor_master[lchip]->cur_evt_idx++]);
                    evt->evt = CTC_CLI_CHIP_MON_EVT_TEMPERATURE_BACK_TO_NORMAL;
                    sal_time(&(evt->timestamp));
                    evt->from.temp_value = g_chip_monitor_master[lchip]->last_record.temprature;
                    evt->to.temp_value = temp;
                    g_chip_monitor_master[lchip]->cur_evt_idx =
                        ((g_chip_monitor_master[lchip]->cur_evt_idx<CTC_CLI_CHIP_MON_MAX_HIS) ? g_chip_monitor_master[lchip]->cur_evt_idx: 0);
                }
                g_chip_monitor_master[lchip]->last_record.valid |= CTC_CLI_CHIP_MON_TEMPERATURE;
                g_chip_monitor_master[lchip]->last_record.temprature = temp;
            }
        }

        if (CTC_FLAG_ISSET(g_chip_monitor_master[lchip]->task_bmp, CTC_CLI_CHIP_MON_VOLTAGE))
        {
   	    if(g_ctcs_api_en)
   	    {
   	        ret = ctcs_get_chip_sensor(g_api_ldev, CTC_CHIP_SENSOR_VOLTAGE,&value);

   	    }
   	    else
  	    {
	        ret = ctc_get_chip_sensor(g_api_ldev, CTC_CHIP_SENSOR_VOLTAGE, &value);
   	    }
            if (!ret)
            {
                volt = value;
                if (volt >= g_chip_monitor_master[lchip]->voltage_high)
                {
                    evt = &(g_chip_monitor_master[lchip]->evt[g_chip_monitor_master[lchip]->cur_evt_idx++]);
                    evt->evt = CTC_CLI_CHIP_MON_EVT_VOLT_HIGH;
                    sal_time(&(evt->timestamp));
                    evt->from.volt_value = g_chip_monitor_master[lchip]->last_record.voltage;
                    evt->to.volt_value = volt;
                    g_chip_monitor_master[lchip]->cur_evt_idx =
                        ((g_chip_monitor_master[lchip]->cur_evt_idx<CTC_CLI_CHIP_MON_MAX_HIS) ? g_chip_monitor_master[lchip]->cur_evt_idx: 0);
                }
                else if (volt <= g_chip_monitor_master[lchip]->voltage_low)
                {
                    evt = &(g_chip_monitor_master[lchip]->evt[g_chip_monitor_master[lchip]->cur_evt_idx++]);
                    evt->evt = CTC_CLI_CHIP_MON_EVT_VOLT_LOW;
                    sal_time(&(evt->timestamp));
                    evt->from.volt_value = g_chip_monitor_master[lchip]->last_record.voltage;
                    evt->to.volt_value = volt;
                    g_chip_monitor_master[lchip]->cur_evt_idx =
                        ((g_chip_monitor_master[lchip]->cur_evt_idx<CTC_CLI_CHIP_MON_MAX_HIS) ? g_chip_monitor_master[lchip]->cur_evt_idx: 0);
                }
                else if ((g_chip_monitor_master[lchip]->last_record.valid & CTC_CLI_CHIP_MON_VOLTAGE) &&
                         ((g_chip_monitor_master[lchip]->last_record.voltage >= g_chip_monitor_master[lchip]->voltage_high) ||
                         (g_chip_monitor_master[lchip]->last_record.voltage <= g_chip_monitor_master[lchip]->voltage_low)))
                {
                    evt = &(g_chip_monitor_master[lchip]->evt[g_chip_monitor_master[lchip]->cur_evt_idx++]);
                    evt->evt = CTC_CLI_CHIP_MON_EVT_VOLT_BACK_TO_NORMAL;
                    sal_time(&(evt->timestamp));
                    evt->from.volt_value = g_chip_monitor_master[lchip]->last_record.voltage;
                    evt->to.volt_value = volt;
                    g_chip_monitor_master[lchip]->cur_evt_idx =
                        ((g_chip_monitor_master[lchip]->cur_evt_idx<CTC_CLI_CHIP_MON_MAX_HIS) ? g_chip_monitor_master[lchip]->cur_evt_idx: 0);
                }
                g_chip_monitor_master[lchip]->last_record.valid |= CTC_CLI_CHIP_MON_VOLTAGE;
                g_chip_monitor_master[lchip]->last_record.voltage = volt;
            }
        }

        if (CTC_FLAG_ISSET(g_chip_monitor_master[lchip]->task_bmp, CTC_CLI_CHIP_MON_MAC_ERR))
        {
            for (lport=0; lport<max_port_num_per_chip; lport++)
            {
                gport = CTC_MAP_LPORT_TO_GPORT(gchip, lport);
                sal_memset(&stats, 0, sizeof(stats));
                stats.stats_mode = CTC_STATS_MODE_DETAIL;

                if(g_ctcs_api_en)
                {
                    ret = ctcs_stats_get_mac_stats(g_api_ldev, gport, CTC_STATS_MAC_STATS_RX, &stats);
                }
                else
                {
                    ret = ctc_stats_get_mac_stats(gport, CTC_STATS_MAC_STATS_RX, &stats);
                }
                if (ret < 0)
                {
                    continue;
                }

                last_rx = &(g_chip_monitor_master[lchip]->last_record.mac_rx[lport].u.stats_detail.stats.rx_stats);
                cur_rx = &(stats.u.stats_detail.stats.rx_stats);
                if (cur_rx->fcs_error_pkts != last_rx->fcs_error_pkts)
                {
                    evt = &(g_chip_monitor_master[lchip]->evt[g_chip_monitor_master[lchip]->cur_evt_idx++]);
                    evt->evt = CTC_CLI_CHIP_MON_EVT_RX_FCS_ERR;
                    evt->gport = gport;
                    sal_time(&(evt->timestamp));
                    evt->from.stats_value = last_rx->fcs_error_pkts;
                    evt->to.stats_value = cur_rx->fcs_error_pkts;
                    g_chip_monitor_master[lchip]->cur_evt_idx =
                        ((g_chip_monitor_master[lchip]->cur_evt_idx<CTC_CLI_CHIP_MON_MAX_HIS) ? g_chip_monitor_master[lchip]->cur_evt_idx: 0);
                }
                if (cur_rx->mac_overrun_pkts != last_rx->mac_overrun_pkts)
                {
                    evt = &(g_chip_monitor_master[lchip]->evt[g_chip_monitor_master[lchip]->cur_evt_idx++]);
                    evt->evt = CTC_CLI_CHIP_MON_EVT_RX_MAC_OVERRUN;
                    evt->gport = gport;
                    sal_time(&(evt->timestamp));
                    evt->from.stats_value = last_rx->mac_overrun_pkts;
                    evt->to.stats_value = cur_rx->mac_overrun_pkts;
                    g_chip_monitor_master[lchip]->cur_evt_idx =
                        ((g_chip_monitor_master[lchip]->cur_evt_idx<CTC_CLI_CHIP_MON_MAX_HIS) ? g_chip_monitor_master[lchip]->cur_evt_idx: 0);
                }
                if (cur_rx->bad_63_pkts != last_rx->bad_63_pkts)
                {
                    evt = &(g_chip_monitor_master[lchip]->evt[g_chip_monitor_master[lchip]->cur_evt_idx++]);
                    evt->evt = CTC_CLI_CHIP_MON_EVT_RX_BAD_63;
                    evt->gport = gport;
                    sal_time(&(evt->timestamp));
                    evt->from.stats_value = last_rx->bad_63_pkts;
                    evt->to.stats_value = cur_rx->bad_63_pkts;
                    g_chip_monitor_master[lchip]->cur_evt_idx =
                        ((g_chip_monitor_master[lchip]->cur_evt_idx<CTC_CLI_CHIP_MON_MAX_HIS) ? g_chip_monitor_master[lchip]->cur_evt_idx: 0);
                }
                if (cur_rx->bad_jumbo_pkts != last_rx->bad_jumbo_pkts)
                {
                    evt = &(g_chip_monitor_master[lchip]->evt[g_chip_monitor_master[lchip]->cur_evt_idx++]);
                    evt->evt = CTC_CLI_CHIP_MON_EVT_RX_BAD_JUMBO;
                    evt->gport = gport;
                    sal_time(&(evt->timestamp));
                    evt->from.stats_value = last_rx->bad_jumbo_pkts;
                    evt->to.stats_value = cur_rx->bad_jumbo_pkts;
                    g_chip_monitor_master[lchip]->cur_evt_idx =
                        ((g_chip_monitor_master[lchip]->cur_evt_idx<CTC_CLI_CHIP_MON_MAX_HIS) ? g_chip_monitor_master[lchip]->cur_evt_idx: 0);
                }

                sal_memcpy(&(g_chip_monitor_master[lchip]->last_record.mac_rx[lport]), &stats, sizeof(stats));

                sal_memset(&stats, 0, sizeof(stats));
                stats.stats_mode = CTC_STATS_MODE_DETAIL;
                if(g_ctcs_api_en)
                {
                    ret = ctcs_stats_get_mac_stats(g_api_ldev, gport, CTC_STATS_MAC_STATS_TX, &stats);
                }
                else
                {
                    ret = ctc_stats_get_mac_stats(gport, CTC_STATS_MAC_STATS_TX, &stats);
                }
                if (ret < 0)
                {
                    continue;
                }

                last_tx = &(g_chip_monitor_master[lchip]->last_record.mac_tx[lport].u.stats_detail.stats.tx_stats);
                cur_tx = &(stats.u.stats_detail.stats.tx_stats);
                if (cur_tx->fcs_error_pkts != last_tx->fcs_error_pkts)
                {
                    evt = &(g_chip_monitor_master[lchip]->evt[g_chip_monitor_master[lchip]->cur_evt_idx++]);
                    evt->evt = CTC_CLI_CHIP_MON_EVT_TX_FCS_ERR;
                    evt->gport = gport;
                    sal_time(&(evt->timestamp));
                    evt->from.stats_value = last_tx->fcs_error_pkts;
                    evt->to.stats_value = cur_tx->fcs_error_pkts;
                    g_chip_monitor_master[lchip]->cur_evt_idx =
                        ((g_chip_monitor_master[lchip]->cur_evt_idx<CTC_CLI_CHIP_MON_MAX_HIS) ? g_chip_monitor_master[lchip]->cur_evt_idx: 0);
                }
                if (cur_tx->mac_underrun_pkts != last_tx->mac_underrun_pkts)
                {
                    evt = &(g_chip_monitor_master[lchip]->evt[g_chip_monitor_master[lchip]->cur_evt_idx++]);
                    evt->evt = CTC_CLI_CHIP_MON_EVT_TX_MAC_UNDERRUN;
                    evt->gport = gport;
                    sal_time(&(evt->timestamp));
                    evt->from.stats_value = last_tx->mac_underrun_pkts;
                    evt->to.stats_value = cur_tx->mac_underrun_pkts;
                    g_chip_monitor_master[lchip]->cur_evt_idx =
                        ((g_chip_monitor_master[lchip]->cur_evt_idx<CTC_CLI_CHIP_MON_MAX_HIS) ? g_chip_monitor_master[lchip]->cur_evt_idx: 0);
                }

                sal_memcpy(&(g_chip_monitor_master[lchip]->last_record.mac_tx[lport]), &stats, sizeof(stats));
            }

            g_chip_monitor_master[lchip]->last_record.valid |= CTC_CLI_CHIP_MON_MAC_ERR;
        }

        CTC_CLI_CHIP_MON_UNLOCK();
        sal_task_sleep(g_chip_monitor_master[lchip]->cycle);
    }

    task = *(sal_task_t**)(argv[1]);
    if (task)
    {
        sal_task_destroy(task);
        *(sal_task_t**)(argv[1]) = 0;
    }
    mem_free(user_param);
}

CTC_CLI(ctc_cli_chip_monitor,
        ctc_cli_chip_monitor_cmd,
        "chip monitor (((temprature|voltage) (threshold high VALUE low VALUE|))|mac-error) (start|stop) ",
        "Chip module",
        "Chip monitor",
        "Temperature",
        "Voltage",
        "Threshold",
        "Threshold high",
        "Threshold high value",
        "Threshold low",
        "Threshold low value",
        "Mac stats error",
        "Start monitor",
        "Stop monitor")
{
    int32 ret = 0;
	uint8 lchip = 0;
    uint8 gchip = 0;
    uint8 index = 0;
    int32 high = 0;
    int32 low = 0;
    uint8 task = 0;
    uint8 have_thres = 0;
    uintptr* task_argv = NULL;
    char buffer[SAL_TASK_MAX_NAME_LEN]={0};


    lchip = g_api_ldev;

   if(g_ctcs_api_en)
    {
   	 ret = ctcs_get_gchip_id(g_api_ldev, &gchip);

    }
   else
   {
	ret = ctc_get_gchip_id(g_api_ldev, &gchip);
   }
    if (ret < 0)
    {
        ctc_cli_out("%% ret = %d, %s \n", ret, ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    CTC_CLI_CHIP_MON_CHECK_INIT(lchip);

    index = CTC_CLI_GET_ARGC_INDEX("temprature");
    if (0xFF != index)
    {
        task = CTC_CLI_CHIP_MON_TEMPERATURE;
    }
    index = CTC_CLI_GET_ARGC_INDEX("voltage");
    if (0xFF != index)
    {
        task = CTC_CLI_CHIP_MON_VOLTAGE;
    }
    index = CTC_CLI_GET_ARGC_INDEX("mac-error");
    if (0xFF != index)
    {
        task = CTC_CLI_CHIP_MON_MAC_ERR;
    }

    index = CTC_CLI_GET_ARGC_INDEX("high");
    if (0xFF != index)
    {
        CTC_CLI_GET_INTEGER("threshold high", high, argv[index+1]);
        have_thres = 1;
    }
    index = CTC_CLI_GET_ARGC_INDEX("low");
    if (0xFF != index)
    {
        CTC_CLI_GET_INTEGER("threshold low", low, argv[index+1]);
        have_thres = 1;
    }

    if (have_thres && (high <= low))
    {
        ctc_cli_out("%% Invalid threshold value \n");
        return CLI_ERROR;
    }

    CTC_CLI_CHIP_MON_LOCK();

    if (have_thres)
    {
        if (task == CTC_CLI_CHIP_MON_TEMPERATURE)
        {
            g_chip_monitor_master[lchip]->temprature_high = high;
            g_chip_monitor_master[lchip]->temprature_low = low;
        }
        if (task == CTC_CLI_CHIP_MON_VOLTAGE)
        {
            g_chip_monitor_master[lchip]->voltage_high = high;
            g_chip_monitor_master[lchip]->voltage_low = low;
        }
    }

    index = CTC_CLI_GET_ARGC_INDEX("start");
    if (0xFF != index)
    {
        if (g_chip_monitor_master[lchip]->task_bmp)
        {
            CTC_SET_FLAG(g_chip_monitor_master[lchip]->task_bmp, task);
        }
        else
        {
            CTC_SET_FLAG(g_chip_monitor_master[lchip]->task_bmp, task);
            if (!g_chip_monitor_master[lchip]->task)
            {
                task_argv = (uintptr*)mem_malloc(MEM_CLI_MODULE, sizeof(uintptr)*3);
                if(NULL == task_argv)
                {
                    CTC_CLI_CHIP_MON_UNLOCK();
                    return CLI_ERROR;
                }

                task_argv[0] = lchip;
                task_argv[1] = (uintptr)(&(g_chip_monitor_master[lchip]->task));
                task_argv[2] = (uintptr)vty;
                sal_sprintf(buffer, "system monitor-%d", lchip);
                if (0 != sal_task_create(&(g_chip_monitor_master[lchip]->task),
                                         buffer, 0, SAL_TASK_PRIO_DEF, ctc_cli_chip_mon_task, (void*)(task_argv)))
                {
                    sal_task_destroy(g_chip_monitor_master[lchip]->task);
                    g_chip_monitor_master[lchip]->task = NULL;
                    ctc_cli_out("%% Start monitor task failed \n");
                    CTC_CLI_CHIP_MON_UNLOCK();
                    return CLI_ERROR;
                }
            }
        }
    }
    else
    {
        if (CTC_FLAG_ISSET(g_chip_monitor_master[lchip]->task_bmp, task))
        {
            CTC_UNSET_FLAG(g_chip_monitor_master[lchip]->task_bmp, task);
            CTC_UNSET_FLAG(g_chip_monitor_master[lchip]->last_record.valid, task);
        }
    }

    CTC_CLI_CHIP_MON_UNLOCK();

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_chip_monitor_interval,
        ctc_cli_chip_monitor_interval_cmd,
        "chip monitor interval VALUE ",
        "Chip module",
        "Chip monitor",
        "Monitor interval",
        "Interval time value in second, default is 60s")
{
    int32 ret = 0;
	uint8 lchip = 0;
    uint8 gchip = 0;
    uint32 cycle = 0;


    lchip = g_api_ldev;

   if(g_ctcs_api_en)
    {
   	 ret = ctcs_get_gchip_id(g_api_ldev, &gchip);

    }
   else
   {
	ret = ctc_get_gchip_id(g_api_ldev, &gchip);
   }
    if (ret < 0)
    {
        ctc_cli_out("%% ret = %d, %s \n", ret, ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    CTC_CLI_CHIP_MON_CHECK_INIT(lchip);

    CTC_CLI_GET_UINT32_RANGE("cycle", cycle, argv[0], 10, 600);

    CTC_CLI_CHIP_MON_LOCK();

    g_chip_monitor_master[lchip]->cycle = cycle*1000;

    CTC_CLI_CHIP_MON_UNLOCK();

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_chip_show_chip_monitor_status,
        ctc_cli_chip_show_chip_monitor_status_cmd,
        "show chip monitor status ",
        CTC_CLI_SHOW_STR,
        "Chip module",
        "Chip monitor",
        "Chip monitor status")
{
    int32 ret = 0;
	uint8 lchip = 0;
    uint8 gchip = 0;

    lchip = g_api_ldev;

   if(g_ctcs_api_en)
    {
   	 ret = ctcs_get_gchip_id(g_api_ldev, &gchip);

    }
   else
   {
	ret = ctc_get_gchip_id(g_api_ldev, &gchip);
   }
    if (ret < 0)
    {
        ctc_cli_out("%% ret = %d, %s \n", ret, ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    CTC_CLI_CHIP_MON_CHECK_INIT(lchip);

    ctc_cli_out("%-15s%-10s%-10s%-10s%-10s%s\n", "Task", "ThrHi", "ThrLo", "Curr", "State", "Cycle");
    ctc_cli_out("--------------------------------------------------------------------\n");

    CTC_CLI_CHIP_MON_LOCK();

    if (g_chip_monitor_master[lchip]->last_record.valid & CTC_CLI_CHIP_MON_TEMPERATURE)
    {
        ctc_cli_out("%-15s%-10d%-10d%-10d%-10s%ds\n", "Temperature",
            g_chip_monitor_master[lchip]->temprature_high,
            g_chip_monitor_master[lchip]->temprature_low,
            g_chip_monitor_master[lchip]->last_record.temprature,
            ((CTC_FLAG_ISSET(g_chip_monitor_master[lchip]->task_bmp, CTC_CLI_CHIP_MON_TEMPERATURE))? "Running": "Stoped"),
            g_chip_monitor_master[lchip]->cycle/1000);
    }
    else
    {
        ctc_cli_out("%-15s%-10d%-10d%-10s%-10s%ds\n", "Temperature",
            g_chip_monitor_master[lchip]->temprature_high,
            g_chip_monitor_master[lchip]->temprature_low,
            "-",
            ((CTC_FLAG_ISSET(g_chip_monitor_master[lchip]->task_bmp, CTC_CLI_CHIP_MON_TEMPERATURE))? "Running": "Stoped"),
            g_chip_monitor_master[lchip]->cycle/1000);
    }
    if (g_chip_monitor_master[lchip]->last_record.valid & CTC_CLI_CHIP_MON_VOLTAGE)
    {
        ctc_cli_out("%-15s%-10d%-10d%-10d%-10s%ds\n", "Voltage",
            g_chip_monitor_master[lchip]->voltage_high,
            g_chip_monitor_master[lchip]->voltage_low,
            g_chip_monitor_master[lchip]->last_record.voltage,
            ((CTC_FLAG_ISSET(g_chip_monitor_master[lchip]->task_bmp, CTC_CLI_CHIP_MON_VOLTAGE))? "Running": "Stoped"),
            g_chip_monitor_master[lchip]->cycle/1000);
    }
    else
    {
        ctc_cli_out("%-15s%-10d%-10d%-10s%-10s%ds\n", "Voltage",
            g_chip_monitor_master[lchip]->voltage_high,
            g_chip_monitor_master[lchip]->voltage_low,
            "-",
            ((CTC_FLAG_ISSET(g_chip_monitor_master[lchip]->task_bmp, CTC_CLI_CHIP_MON_VOLTAGE))? "Running": "Stoped"),
            g_chip_monitor_master[lchip]->cycle/1000);
    }
    ctc_cli_out("%-15s%-10s%-10s%-10s%-10s%ds\n", "MacError",
        "-",
        "-",
        "-",
        ((CTC_FLAG_ISSET(g_chip_monitor_master[lchip]->task_bmp, CTC_CLI_CHIP_MON_MAC_ERR))? "Running": "Stoped"),
        g_chip_monitor_master[lchip]->cycle/1000);

    CTC_CLI_CHIP_MON_UNLOCK();

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_chip_show_chip_monitor_history,
        ctc_cli_chip_show_chip_monitor_history_cmd,
        "show chip monitor log ",
        CTC_CLI_SHOW_STR,
        "Chip module",
        "Chip monitor",
        "Chip monitor log")
{
    int32 ret = 0;
    uint8 gchip = 0;
    uint16 idx = 0;
    uint16 cnt = CTC_CLI_CHIP_MON_MAX_HIS;
    ctc_cli_chip_monitor_event_t* p_evt = NULL;
    char str_time[64] = {0};
    char* p_time_str = NULL;
	uint8 lchip = g_api_ldev;
   if(g_ctcs_api_en)
    {
   	 ret = ctcs_get_gchip_id(g_api_ldev, &gchip);

    }
   else
   {
	ret = ctc_get_gchip_id(g_api_ldev, &gchip);
   }
    if (ret < 0)
    {
        ctc_cli_out("%% ret = %d, %s \n", ret, ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    CTC_CLI_CHIP_MON_CHECK_INIT(lchip);

    CTC_CLI_CHIP_MON_LOCK();

    idx = g_chip_monitor_master[lchip]->cur_evt_idx;
    idx = ((idx==0) ? CTC_CLI_CHIP_MON_MAX_HIS-1: idx-1);
    while(cnt)
    {
        p_evt = &(g_chip_monitor_master[lchip]->evt[idx]);
        p_time_str = sal_ctime(&(p_evt->timestamp));
        if(NULL == p_time_str)
        {
            CTC_CLI_CHIP_MON_UNLOCK();
            return CLI_ERROR;
        }
		sal_strncpy(str_time, p_time_str, (sizeof(str_time)-1));
        switch (p_evt->evt)
        {
            case CTC_CLI_CHIP_MON_EVT_TEMPERATURE_HIGH:
            {
                ctc_cli_out("[%s] Temperature high %d (threshold %d) \n", str_time, p_evt->to.temp_value, g_chip_monitor_master[lchip]->temprature_high);
                break;
            }
            case CTC_CLI_CHIP_MON_EVT_TEMPERATURE_LOW:
            {
                ctc_cli_out("[%s] Temperature low %d (threshold %d) \n", str_time, p_evt->to.temp_value, g_chip_monitor_master[lchip]->temprature_low);
                break;
            }
            case CTC_CLI_CHIP_MON_EVT_TEMPERATURE_BACK_TO_NORMAL:
            {
                ctc_cli_out("[%s] Temperature back to normal %d (threshold high %d low %d) \n", str_time, p_evt->to.temp_value, g_chip_monitor_master[lchip]->temprature_high, g_chip_monitor_master[lchip]->temprature_low);
                break;
            }
            case CTC_CLI_CHIP_MON_EVT_VOLT_HIGH:
            {
                ctc_cli_out("[%s] Voltage high %dmV (threshold %dmV) \n", str_time, p_evt->to.volt_value, g_chip_monitor_master[lchip]->voltage_high);
                break;
            }
            case CTC_CLI_CHIP_MON_EVT_VOLT_LOW:
            {
                ctc_cli_out("[%s] Voltage low %dmV (threshold %dmV) \n", str_time, p_evt->to.volt_value, g_chip_monitor_master[lchip]->voltage_low);
                break;
            }
            case CTC_CLI_CHIP_MON_EVT_VOLT_BACK_TO_NORMAL:
            {
                ctc_cli_out("[%s] Voltage back to normal %dmV (threshold high %dmV low %dmV) \n", str_time, p_evt->to.volt_value, g_chip_monitor_master[lchip]->voltage_high, g_chip_monitor_master[lchip]->voltage_low);
                break;
            }
            case CTC_CLI_CHIP_MON_EVT_RX_FCS_ERR:
            {
                ctc_cli_out("[%s] MacRX on port 0x%4.4x FCSError Pkt changed from %"PRIu64" to %"PRIu64" \n", str_time, p_evt->gport, p_evt->from.stats_value, p_evt->to.stats_value);
                break;
            }
            case CTC_CLI_CHIP_MON_EVT_RX_MAC_OVERRUN:
            {
                ctc_cli_out("[%s] MacRX on port 0x%4.4x Overrun Pkt changed from %"PRIu64" to %"PRIu64" \n", str_time, p_evt->gport, p_evt->from.stats_value, p_evt->to.stats_value);
                break;
            }
            case CTC_CLI_CHIP_MON_EVT_RX_BAD_63:
            {
                ctc_cli_out("[%s] MacRX on port 0x%4.4x Bad63 Pkt changed from %"PRIu64" to %"PRIu64" \n", str_time, p_evt->gport, p_evt->from.stats_value, p_evt->to.stats_value);
                break;
            }
            case CTC_CLI_CHIP_MON_EVT_RX_BAD_JUMBO:
            {
                ctc_cli_out("[%s] MacRX on port 0x%4.4x BadJumbo Pkt changed from %"PRIu64" to %"PRIu64" \n", str_time, p_evt->gport, p_evt->from.stats_value, p_evt->to.stats_value);
                break;
            }
            case CTC_CLI_CHIP_MON_EVT_TX_FCS_ERR:
            {
                ctc_cli_out("[%s] MacTX on port 0x%4.4x FCSError Pkt changed from %"PRIu64" to %"PRIu64" \n", str_time, p_evt->gport, p_evt->from.stats_value, p_evt->to.stats_value);
                break;
            }
            case CTC_CLI_CHIP_MON_EVT_TX_MAC_UNDERRUN:
            {
                ctc_cli_out("[%s] MacRX on port 0x%4.4x Underrun Pkt changed from %"PRIu64" to %"PRIu64" \n", str_time, p_evt->gport, p_evt->from.stats_value, p_evt->to.stats_value);
                break;
            }
            default :
                break;
        }

        idx = ((idx==0) ? CTC_CLI_CHIP_MON_MAX_HIS-1: idx-1);
        cnt--;
    }

    CTC_CLI_CHIP_MON_UNLOCK();

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_chip_set_scl_decap_offset_step,
        ctc_cli_chip_set_scl_decap_offset_step_cmd,
        "chip global-cfg scl payload offset-granularity VAL ",
        "Chip module",
        "Global config",
        "Scl",
        "Decap or snooping payload",
        "Offset-granularity",
        "Value")
{
    int32 ret = 0;
    uint32 value = 0;

    CTC_CLI_GET_UINT32("offset-step", value, argv[0]);

    if(g_ctcs_api_en)
    {
        ret = ctcs_global_ctl_set(g_api_ldev, CTC_GLOBAL_SCL_PAYLOAD_OFFSET_GRANU, &value);
    }
    else
    {
        ret = ctc_global_ctl_set(CTC_GLOBAL_SCL_PAYLOAD_OFFSET_GRANU, &value);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }
    return ret;
}

CTC_CLI(ctc_cli_chip_get_scl_decap_offset_step,
        ctc_cli_chip_get_scl_decap_offset_step_cmd,
        "show chip global-cfg scl payload offset-granularity ",
        CTC_CLI_SHOW_STR,
        "Chip module",
        "Global config",
        "Scl",
        "Decap or snooping payload",
        "Offset-granularity")
{
    int32 ret = 0;
    uint32 value = 0;


    if(g_ctcs_api_en)
    {
        ret = ctcs_global_ctl_get(g_api_ldev, CTC_GLOBAL_SCL_PAYLOAD_OFFSET_GRANU, &value);
    }
    else
    {
        ret = ctc_global_ctl_get(CTC_GLOBAL_SCL_PAYLOAD_OFFSET_GRANU, &value);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }
    ctc_cli_out("scl decap offset-step: %u\n", value);
    return ret;
}

CTC_CLI(ctc_cli_chip_clear_chip_monitor_history,
        ctc_cli_chip_clear_chip_monitor_history_cmd,
        "clear chip monitor log ",
        CTC_CLI_CLEAR_STR,
        "Chip module",
        "Chip monitor",
        "Chip monitor log")
{
    int32 ret = 0;
    
    uint8 gchip = 0;
    uint8 lchip = 0;

    lchip = g_api_ldev;

   if(g_ctcs_api_en)
    {
   	 ret = ctcs_get_gchip_id(g_api_ldev, &gchip);

    }
   else
   {
	ret = ctc_get_gchip_id(g_api_ldev, &gchip);
   }
    if (ret < 0)
    {
        ctc_cli_out("%% ret = %d, %s \n", ret, ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    CTC_CLI_CHIP_MON_CHECK_INIT(lchip);

    CTC_CLI_CHIP_MON_LOCK();

    sal_memset(g_chip_monitor_master[lchip]->evt, 0, sizeof(g_chip_monitor_master[lchip]->evt));
    g_chip_monitor_master[lchip]->cur_evt_idx = 0;
    g_chip_monitor_master[lchip]->last_record.valid = 0;

    CTC_CLI_CHIP_MON_UNLOCK();

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_chip_lb_hash_select,
        ctc_cli_chip_lb_hash_select_cmd,
        "lb-hash select-id SELECT_ID (hash-select HASH_SELECT|hash-control HASH_CONTROL) value VALUE",
        "Load banlance hash",
        "Hash computer selector",
        "Value of selector",
        "LB hash select config",
        "LB hash select value,reference to ctc_lb_hash_select_t",
        "LB hash control config",
        "LB hash control value,reference to ctc_lb_hash_control_t",
        "Value",
        "Value of hash_control/value of hash_select")
{
    int32 ret = CLI_SUCCESS;
    uint8 index = 0;
    uint8 udf_mask[CTC_LB_HASH_UDF_BYTE_NUM] = {0};
    ctc_lb_hash_config_t hash_cfg;
    sal_memset(&hash_cfg,0,sizeof(hash_cfg));


    CTC_CLI_GET_INTEGER("select-id", hash_cfg.sel_id, argv[0]);
    index = CTC_CLI_GET_ARGC_INDEX("value");
    if (0xFF != index)
    {
        CTC_CLI_GET_INTEGER("value", hash_cfg.value, argv[index + 1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("hash-select");
    if (0xFF != index)
    {
        hash_cfg.cfg_type = 0;
        CTC_CLI_GET_INTEGER("hash-select", hash_cfg.hash_select, argv[index + 1]);

    }
    index = CTC_CLI_GET_ARGC_INDEX("hash-control");
    if (0xFF != index)
    {
        hash_cfg.cfg_type = 1;
        CTC_CLI_GET_INTEGER("hash-control", hash_cfg.hash_control, argv[index + 1]);

    }

    if (CTC_LB_HASH_CONTROL_HASH_TYPE_UDF_DATA_BIT_MASK == hash_cfg.hash_control)
    {
        uint8 sub_idx = 0;
        for (sub_idx = 0; sub_idx < CTC_LB_HASH_UDF_BYTE_NUM && sub_idx < sal_strlen(argv[3])/2; sub_idx++)
        {
            sal_sscanf(argv[3] + 2*sub_idx, "%2hhx", &udf_mask[sub_idx]);
        }
        sal_memcpy(hash_cfg.udf_mask, udf_mask, CTC_LB_HASH_UDF_BYTE_NUM);
    }
    else
    {
        CTC_CLI_GET_INTEGER("value", hash_cfg.value, argv[3]);
    }
    if(g_ctcs_api_en)
    {
        ret = ctcs_global_ctl_set(g_api_ldev,CTC_GLOBAL_LB_HASH_KEY, &hash_cfg);
    }
    else
    {
        ret = ctc_global_ctl_set(CTC_GLOBAL_LB_HASH_KEY,&hash_cfg);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% ret =%d, %s\n", ret, ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;
}

CTC_CLI(ctc_cli_chip_show_lb_hash_select,
        ctc_cli_chip_show_lb_hash_select_cmd,
        "show lb-hash select-id SELECT_ID (hash-select HASH_SELECT|hash-control HASH_CONTROL)",
        CTC_CLI_SHOW_STR,
        "Load banlance hash",
        "Hash computer selector",
        "Value of selector",
        "Hash select config",
        "Hash select value,reference to ctc_lb_hash_select_t",
        "Hash control config",
        "Hash control value,reference to ctc_lb_hash_control_t")
{
    int32 ret = CLI_SUCCESS;
    uint8 index = 0;
    ctc_lb_hash_config_t hash_cfg;
    sal_memset(&hash_cfg,0,sizeof(hash_cfg));


    CTC_CLI_GET_INTEGER("select-id", hash_cfg.sel_id, argv[0]);
    index = CTC_CLI_GET_ARGC_INDEX("hash-select");
    if (0xFF != index)
    {
        hash_cfg.cfg_type = 0;
        CTC_CLI_GET_INTEGER("hash-select", hash_cfg.hash_select, argv[index + 1]);
    }
    index = CTC_CLI_GET_ARGC_INDEX("hash-control");
    if (0xFF != index)
    {
        hash_cfg.cfg_type = 1;
        CTC_CLI_GET_INTEGER("hash-control", hash_cfg.hash_control, argv[index + 1]);
    }
    if (g_ctcs_api_en)
    {
        ret = ctcs_global_ctl_get(g_api_ldev, CTC_GLOBAL_LB_HASH_KEY, &hash_cfg);
    }
    else
    {
        ret = ctc_global_ctl_get(CTC_GLOBAL_LB_HASH_KEY, &hash_cfg);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% ret =%d, %s\n", ret, ctc_get_error_desc(ret));
        return CLI_ERROR;
    }
    if(CTC_LB_HASH_CONTROL_HASH_TYPE_UDF_DATA_BIT_MASK == hash_cfg.hash_control)
    {
        uint8 sub_idx = 0;
        ctc_cli_out("udf-mask:0x");
        for (sub_idx = 0; sub_idx < CTC_LB_HASH_UDF_BYTE_NUM; sub_idx++)
        {
            ctc_cli_out("%02x", hash_cfg.udf_mask[CTC_LB_HASH_UDF_BYTE_NUM - 1 - sub_idx]);
        }
        ctc_cli_out("\n");
    }
    else
    {
        ctc_cli_out("value:0x%04x\n", hash_cfg.value);
    }
    return ret;
}

CTC_CLI(ctc_cli_chip_lb_hash_set_linkagg_offset,
        ctc_cli_chip_lb_hash_set_linkagg_offset_cmd,
        "lb-hash select-offset profile-id PROFILE_ID linkagg \
        (static (unicast|non-unicast) | dlb-flow-set unicast | lsh (unicast | non-unicast)) (use-packet-head | offset OFFSET)",
        "Load banlance hash",
        "Select-offset-cfg",
        "Profile ID",
        "Profile ID value",
        "Linkagg module",
        "Static mode",
        "Unicast",
        "Non-unicast",
        "Dlb-flow-set",
        "Unicast",
        "Link-self-healing",
        "Unicast",
        "Non-unicast",
        "Use packet header hash",
        "Use offset",
        "Offset value")
        {
            uint8 index = 0;
			int32 ret = 0;
            ctc_lb_hash_offset_t hash_offset;
			sal_memset(&hash_offset,0,sizeof(ctc_lb_hash_offset_t));

            hash_offset.hash_module = CTC_LB_HASH_MODULE_LINKAGG;
            CTC_CLI_GET_UINT8("profile-id", hash_offset.profile_id, argv[0]);

            index = CTC_CLI_GET_ARGC_INDEX("static");
            if (0xFF != index)
            {
                hash_offset.hash_mode = CTC_LB_HASH_MODE_STATIC;
            }
            index = CTC_CLI_GET_ARGC_INDEX("dlb-flow-set");
            if (0xFF != index)
            {
                hash_offset.hash_mode = CTC_LB_HASH_MODE_DLB_FLOW_SET;
            }
            index = CTC_CLI_GET_ARGC_INDEX("lsh");
            if (0xFF != index)
            {
                hash_offset.hash_mode = CTC_LB_HASH_MODE_LSH;

            }
            index = CTC_CLI_GET_ARGC_INDEX("unicast");
            if (0xFF != index)
            {
                hash_offset.fwd_type = CTC_LB_HASH_FWD_UC;

            }
			index = CTC_CLI_GET_ARGC_INDEX("non-unicast");
            if (0xFF != index)
            {
                hash_offset.fwd_type = CTC_LB_HASH_FWD_NON_UC;

            }
            index = CTC_CLI_GET_ARGC_INDEX("use-packet-head");
            if (0xFF != index)
            {
                hash_offset.use_packet_head_hash = 1;
            }

            index = CTC_CLI_GET_ARGC_INDEX("offset");
            if (0xFF != index)
            {
                CTC_CLI_GET_INTEGER("offset", hash_offset.offset, argv[index + 1]);

            }
            if (g_ctcs_api_en)
            {
                ret = ctcs_global_ctl_set(g_api_ldev,CTC_GLOBAL_LB_HASH_OFFSET_PROFILE, & hash_offset);
            }
            else
            {
                ret = ctc_global_ctl_set(CTC_GLOBAL_LB_HASH_OFFSET_PROFILE, & hash_offset);
            }

            if (ret < 0)
            {
                ctc_cli_out("%% ret =%d, %s\n", ret, ctc_get_error_desc(ret));
                return CLI_ERROR;
            }

            return ret;

        }

CTC_CLI(ctc_cli_chip_show_lb_hash_linkagg_offset,
        ctc_cli_chip_show_lb_hash_linkagg_offset_cmd,
        "show lb-hash select-offset profile-id PROFILE_ID linkagg \
        (static (unicast|non-unicast)|dlb-flow-set unicast|lsh (unicast|non-unicast))",
        CTC_CLI_SHOW_STR,
        "Load banlance hash",
        "Select-offset-cfg",
        "Profile ID",
        "Profile ID value",
        "Linkagg module",
        "Static mode",
        "Unicast",
        "Dlb-flow-set",
        "Unicast",
        "Non-unicast",
        "Link-self-healing",
        "Unicast",
        "Non-unicast")
        {
            uint8 index = 0;
			int32 ret = 0;
            ctc_lb_hash_offset_t hash_offset;
			sal_memset(&hash_offset,0,sizeof(ctc_lb_hash_offset_t));

            hash_offset.hash_module = CTC_LB_HASH_MODULE_LINKAGG;
            CTC_CLI_GET_UINT8("profile-id", hash_offset.profile_id, argv[0]);

            index = CTC_CLI_GET_ARGC_INDEX("static");
            if (0xFF != index)
            {
                hash_offset.hash_mode = CTC_LB_HASH_MODE_STATIC;
            }
            index = CTC_CLI_GET_ARGC_INDEX("dlb-flow-set");
            if (0xFF != index)
            {
                hash_offset.hash_mode = CTC_LB_HASH_MODE_DLB_FLOW_SET;
            }
            index = CTC_CLI_GET_ARGC_INDEX("lsh");
            if (0xFF != index)
            {
                hash_offset.hash_mode = CTC_LB_HASH_MODE_LSH;

            }
            index = CTC_CLI_GET_ARGC_INDEX("unicast");
            if (0xFF != index)
            {
                hash_offset.fwd_type = CTC_LB_HASH_FWD_UC;

            }
			index = CTC_CLI_GET_ARGC_INDEX("non-unicast");
            if (0xFF != index)
            {
                hash_offset.fwd_type = CTC_LB_HASH_FWD_NON_UC;

            }

            if (g_ctcs_api_en)
            {
                ret = ctcs_global_ctl_get(g_api_ldev, CTC_GLOBAL_LB_HASH_OFFSET_PROFILE, &hash_offset);
            }
            else
            {
                ret = ctc_global_ctl_get(CTC_GLOBAL_LB_HASH_OFFSET_PROFILE, &hash_offset);
            }

            if (ret < 0)
            {
                ctc_cli_out("%% ret =%d, %s\n", ret, ctc_get_error_desc(ret));
                return CLI_ERROR;
            }

            if (hash_offset.use_entropy_hash)
            {
                ctc_cli_out("use entropy:%d\n", 1);
            }
            else if(hash_offset.use_packet_head_hash)
            {
                ctc_cli_out("use packet head:%d\n", 1);
            }
            ctc_cli_out("hash offset:%d\n", hash_offset.offset);
            ctc_cli_out("select group id(4 select group):%d\n", hash_offset.offset/32);
            ctc_cli_out("select group id(8 select group):%d\n", hash_offset.offset/16);

            return ret;
        }

CTC_CLI(ctc_cli_chip_lb_hash_set_stacking_offset,
        ctc_cli_chip_lb_hash_set_stacking_offset_cmd,
        "lb-hash select-offset profile-id PROFILE_ID stacking \
        (static (unicast|non-unicast) | dlb-flow-set unicast | lsh (unicast | non-unicast)) \
        (use-packet-head | offset OFFSET)",
        "Load banlance hash",
        "Select-offset-cfg",
        "Profile ID",
        "Profile ID value",
        "Stacking module",
        "Static mode",
        "Unicast",
        "Non-unicast",
        "Dlb-flow-set",
        "Unicast",
        "Link-self-healing",
        "Unicast",
        "Non-unicast",
        "Use packet header hash",
        "Use offset",
        "Offset value")
        {
            uint8 index = 0;
			int32 ret = 0;
            ctc_lb_hash_offset_t hash_offset;
			sal_memset(&hash_offset,0,sizeof(ctc_lb_hash_offset_t));

            hash_offset.hash_module = CTC_LB_HASH_MODULE_STACKING;
            CTC_CLI_GET_UINT8("profile-id", hash_offset.profile_id, argv[0]);

            index = CTC_CLI_GET_ARGC_INDEX("static");
            if (0xFF != index)
            {
                hash_offset.hash_mode = CTC_LB_HASH_MODE_STATIC;
            }
            index = CTC_CLI_GET_ARGC_INDEX("dlb-flow-set");
            if (0xFF != index)
            {
                hash_offset.hash_mode = CTC_LB_HASH_MODE_DLB_FLOW_SET;
            }
            index = CTC_CLI_GET_ARGC_INDEX("lsh");
            if (0xFF != index)
            {
                hash_offset.hash_mode = CTC_LB_HASH_MODE_LSH;

            }
            index = CTC_CLI_GET_ARGC_INDEX("unicast");
            if (0xFF != index)
            {
                hash_offset.fwd_type = CTC_LB_HASH_FWD_UC;

            }
			index = CTC_CLI_GET_ARGC_INDEX("non-unicast");
            if (0xFF != index)
            {
                hash_offset.fwd_type = CTC_LB_HASH_FWD_NON_UC;

            }
            index = CTC_CLI_GET_ARGC_INDEX("use-packet-head");
            if (0xFF != index)
            {
                hash_offset.use_packet_head_hash = 1;
            }

            index = CTC_CLI_GET_ARGC_INDEX("offset");
            if (0xFF != index)
            {
                CTC_CLI_GET_INTEGER("offset", hash_offset.offset, argv[index + 1]);

            }
            if (g_ctcs_api_en)
            {
                ret = ctcs_global_ctl_set(g_api_ldev,CTC_GLOBAL_LB_HASH_OFFSET_PROFILE, & hash_offset);
            }
            else
            {
                ret = ctc_global_ctl_set(CTC_GLOBAL_LB_HASH_OFFSET_PROFILE, & hash_offset);
            }

            if (ret < 0)
            {
                ctc_cli_out("%% ret =%d, %s\n", ret, ctc_get_error_desc(ret));
                return CLI_ERROR;
            }

            return ret;

        }

CTC_CLI(ctc_cli_chip_show_lb_hash_stacking_offset,
        ctc_cli_chip_show_lb_hash_stacking_offset_cmd,
        "show lb-hash select-offset profile-id PROFILE_ID stacking \
        (static (unicast|non-unicast)|dlb-flow-set unicast|lsh (unicast|non-unicast))",
        CTC_CLI_SHOW_STR,
        "Load banlance hash",
        "Select-offset-cfg",
        "Profile ID",
        "Profile ID value",
        "Stacking module",
        "Static mode",
        "Unicast",
        "Non-unicast",
        "Dlb-flow-set",
        "Unicast",
        "Link-self-healing",
        "Unicast",
        "Non-unicast")
        {
            uint8 index = 0;
			int32 ret = 0;
            ctc_lb_hash_offset_t hash_offset;
			sal_memset(&hash_offset,0,sizeof(ctc_lb_hash_offset_t));

            hash_offset.hash_module = CTC_LB_HASH_MODULE_STACKING;
            CTC_CLI_GET_UINT8("profile-id", hash_offset.profile_id, argv[0]);

            index = CTC_CLI_GET_ARGC_INDEX("static");
            if (0xFF != index)
            {
                hash_offset.hash_mode = CTC_LB_HASH_MODE_STATIC;
            }
            index = CTC_CLI_GET_ARGC_INDEX("dlb-flow-set");
            if (0xFF != index)
            {
                hash_offset.hash_mode = CTC_LB_HASH_MODE_DLB_FLOW_SET;
            }
            index = CTC_CLI_GET_ARGC_INDEX("lsh");
            if (0xFF != index)
            {
                hash_offset.hash_mode = CTC_LB_HASH_MODE_LSH;

            }
            index = CTC_CLI_GET_ARGC_INDEX("unicast");
            if (0xFF != index)
            {
                hash_offset.fwd_type = CTC_LB_HASH_FWD_UC;

            }
			index = CTC_CLI_GET_ARGC_INDEX("non-unicast");
            if (0xFF != index)
            {
                hash_offset.fwd_type = CTC_LB_HASH_FWD_NON_UC;

            }

            if (g_ctcs_api_en)
            {
                ret = ctcs_global_ctl_get(g_api_ldev, CTC_GLOBAL_LB_HASH_OFFSET_PROFILE, &hash_offset);
            }
            else
            {
                ret = ctc_global_ctl_get(CTC_GLOBAL_LB_HASH_OFFSET_PROFILE, &hash_offset);
            }

            if (ret < 0)
            {
                ctc_cli_out("%% ret =%d, %s\n", ret, ctc_get_error_desc(ret));
                return CLI_ERROR;
            }

            if (hash_offset.use_entropy_hash)
            {
                ctc_cli_out("use entropy:%d\n", 1);
            }
            else if(hash_offset.use_packet_head_hash)
            {
                ctc_cli_out("use packet head:%d\n", 1);
            }
            ctc_cli_out("hash offset:%d\n", hash_offset.offset);
            ctc_cli_out("select group id(4 select group):%d\n", hash_offset.offset/32);
            ctc_cli_out("select group id(8 select group):%d\n", hash_offset.offset/16);

            return ret;
        }

CTC_CLI(ctc_cli_chip_lb_hash_set_ecmp_offset,
        ctc_cli_chip_lb_hash_set_ecmp_offset_cmd,
        "lb-hash select-offset profile-id PROFILE_ID ecmp \
        (static (hecmp-grp-en|) (vxlan | nvgre | mpls | ip |) | dlb-flow-set | dlb-flow-member |) \
        (use-entropy | use-packet-head | offset OFFSET)",
        "Load banlance hash",
        "Select-offset-cfg",
        "Profile ID",
        "Profile ID value",
        "Ecmp module",
        "Static mode",
        "Hecmp group level",
        "Vxlan packet",
        "Nvgre packet",
        "Mpls packet",
        "Ip packet",
        "Dlb-flow-set",
        "Dlb member",
        "Use entropy",
        "Use packet header hash",
        "Use offset",
        "Offset value")
        {
            uint8 index = 0;
			int32 ret = 0;
            ctc_lb_hash_offset_t hash_offset;
			sal_memset(&hash_offset,0,sizeof(ctc_lb_hash_offset_t));

            hash_offset.hash_module = CTC_LB_HASH_MODULE_ECMP;
            CTC_CLI_GET_UINT8("profile-id", hash_offset.profile_id, argv[0]);

            index = CTC_CLI_GET_ARGC_INDEX("static");
            if (0xFF != index)
            {
                hash_offset.hash_mode = CTC_LB_HASH_MODE_STATIC;
            }
            index = CTC_CLI_GET_ARGC_INDEX("dlb-flow-set");
            if (0xFF != index)
            {
                hash_offset.hash_mode = CTC_LB_HASH_MODE_DLB_FLOW_SET;
            }
            index = CTC_CLI_GET_ARGC_INDEX("dlb-flow-member");
            if (0xFF != index)
            {
                hash_offset.hash_mode = CTC_LB_HASH_MODE_DLB_MEMBER;
            }

            index = CTC_CLI_GET_ARGC_INDEX("vxlan");
            if (0xFF != index)
            {
                hash_offset.fwd_type = CTC_LB_HASH_FWD_VXLAN;
            }
            index = CTC_CLI_GET_ARGC_INDEX("nvgre");
            if (0xFF != index)
            {
                hash_offset.fwd_type = CTC_LB_HASH_FWD_NVGRE;
            }
            index = CTC_CLI_GET_ARGC_INDEX("mpls");
            if (0xFF != index)
            {
                hash_offset.fwd_type = CTC_LB_HASH_FWD_MPLS;
            }
            index = CTC_CLI_GET_ARGC_INDEX("ip");
            if (0xFF != index)
            {
                hash_offset.fwd_type = CTC_LB_HASH_FWD_IP;
            }

            index = CTC_CLI_GET_ARGC_INDEX("hecmp-grp-en");
            if (0xFF != index)
            {
                hash_offset.hecmp_grp_en = 1;

            }
            index = CTC_CLI_GET_ARGC_INDEX("use-entropy");
            if (0xFF != index)
            {
                hash_offset.use_entropy_hash = 1;
            }
            index = CTC_CLI_GET_ARGC_INDEX("use-packet-head");
            if (0xFF != index)
            {
                hash_offset.use_packet_head_hash = 1;
            }
            index = CTC_CLI_GET_ARGC_INDEX("offset");
            if (0xFF != index)
            {
                CTC_CLI_GET_INTEGER("offset", hash_offset.offset, argv[index + 1]);
            }

            if (g_ctcs_api_en)
            {
                ret = ctcs_global_ctl_set(g_api_ldev, CTC_GLOBAL_LB_HASH_OFFSET_PROFILE, &hash_offset);
            }
            else
            {
                ret = ctc_global_ctl_set(CTC_GLOBAL_LB_HASH_OFFSET_PROFILE, &hash_offset);
            }

            if (ret < 0)
            {
                ctc_cli_out("%% ret =%d, %s\n", ret, ctc_get_error_desc(ret));
                return CLI_ERROR;
            }

            return ret;
        }

CTC_CLI(ctc_cli_chip_show_lb_hash_ecmp_offset,
        ctc_cli_chip_show_lb_hash_ecmp_offset_cmd,
        "show lb-hash select-offset profile-id PROFILE_ID ecmp (static (hecmp-grp-en|) (vxlan | nvgre | mpls | ip) | dlb-flow-set | dlb-flow-member)",
        CTC_CLI_SHOW_STR,
        "Load banlance hash",
        "Select-offset-cfg",
        "Profile ID",
        "Profile ID value",
        "Ecmp module",
        "Static mode",
        "Hecmp group level",
        "Vxlan packet",
        "Nvgre packet",
        "Mpls Packet",
        "Ip packet",
        "Dlb-flow-set",
        "Dlb member")
        {
            uint8 index = 0;
			int32 ret = 0;
            ctc_lb_hash_offset_t hash_offset;
			sal_memset(&hash_offset,0,sizeof(ctc_lb_hash_offset_t));

            hash_offset.hash_module = CTC_LB_HASH_MODULE_ECMP;
            CTC_CLI_GET_UINT8("profile-id", hash_offset.profile_id, argv[0]);

            index = CTC_CLI_GET_ARGC_INDEX("static");
            if (0xFF != index)
            {
                hash_offset.hash_mode = CTC_LB_HASH_MODE_STATIC;
            }
            index = CTC_CLI_GET_ARGC_INDEX("dlb-flow-set");
            if (0xFF != index)
            {
                hash_offset.hash_mode = CTC_LB_HASH_MODE_DLB_FLOW_SET;
            }
            index = CTC_CLI_GET_ARGC_INDEX("dlb-flow-member");
            if (0xFF != index)
            {
                hash_offset.hash_mode = CTC_LB_HASH_MODE_DLB_MEMBER;
            }
            index = CTC_CLI_GET_ARGC_INDEX("none");
            if (0xFF != index)
            {
                hash_offset.fwd_type = CTC_LB_HASH_FWD_NONE;
            }
            index = CTC_CLI_GET_ARGC_INDEX("vxlan");
            if (0xFF != index)
            {
                hash_offset.fwd_type = CTC_LB_HASH_FWD_VXLAN;
            }
            index = CTC_CLI_GET_ARGC_INDEX("nvgre");
            if (0xFF != index)
            {
                hash_offset.fwd_type = CTC_LB_HASH_FWD_NVGRE;
            }
            index = CTC_CLI_GET_ARGC_INDEX("mpls");
            if (0xFF != index)
            {
                hash_offset.fwd_type = CTC_LB_HASH_FWD_MPLS;
            }
            index = CTC_CLI_GET_ARGC_INDEX("ip");
            if (0xFF != index)
            {
                hash_offset.fwd_type = CTC_LB_HASH_FWD_IP;
            }

            index = CTC_CLI_GET_ARGC_INDEX("hecmp-grp-en");
            if (0xFF != index)
            {
                hash_offset.hecmp_grp_en = 1;

            }
            if (g_ctcs_api_en)
            {
                ret = ctcs_global_ctl_get(g_api_ldev, CTC_GLOBAL_LB_HASH_OFFSET_PROFILE, &hash_offset);
            }
            else
            {
                ret = ctc_global_ctl_get(CTC_GLOBAL_LB_HASH_OFFSET_PROFILE, &hash_offset);
            }

            if (ret < 0)
            {
                ctc_cli_out("%% ret =%d, %s\n", ret, ctc_get_error_desc(ret));
                return CLI_ERROR;
            }

            if (hash_offset.hecmp_grp_en)
            {
                ctc_cli_out("hecmp_grp_en:%d\n", 1);
            }
            if (hash_offset.use_entropy_hash)
            {
                ctc_cli_out("use entropy:%d\n", 1);
            }
            if (hash_offset.use_packet_head_hash)
            {
                ctc_cli_out("use packet head:%d\n", 1);
            }
            ctc_cli_out("hash offset:%d\n", hash_offset.offset);
            ctc_cli_out("select group id(4 select group):%d\n", hash_offset.offset/32);
            ctc_cli_out("select group id(8 select group):%d\n", hash_offset.offset/16);

            return ret;
        }

CTC_CLI(ctc_cli_chip_global_overlay_decap_mode,
        ctc_cli_chip_global_overlay_decap_mode_cmd,
        "chip global-cfg vxlan-decap-mode MODE nvgre-decap MODE scl-id SCL_ID",
        "Chip module",
        "Global config",
        "Vxlan decap mode",
        "MODE value",
        "Nvgre decap mode",
        "MODE value",
        "Scl id", "SCL ID")
{
    int32 ret       = CLI_SUCCESS;
    ctc_global_overlay_decap_mode_t decap_mode;

    sal_memset(&decap_mode, 0, sizeof(decap_mode));

    CTC_CLI_GET_UINT8("vxlan decap mode", decap_mode.vxlan_mode, argv[0]);
    CTC_CLI_GET_UINT8("nvgre decap mode", decap_mode.nvgre_mode, argv[1]);
    CTC_CLI_GET_UINT8("scl id", decap_mode.scl_id, argv[2]);

    if(g_ctcs_api_en)
    {
         ret = ctcs_global_ctl_set(g_api_ldev, CTC_GLOBAL_OVERLAY_DECAP_MODE, &decap_mode);
    }
    else
    {
        ret = ctc_global_ctl_set(CTC_GLOBAL_OVERLAY_DECAP_MODE, &decap_mode);
    }

    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;

}
CTC_CLI(ctc_cli_chip_get_global_overlay_decap_mode,
        ctc_cli_chip_get_global_overlay_decap_mode_cmd,
        "show chip global-cfg overlay-mode scl-id SCL_ID",
        CTC_CLI_SHOW_STR,
        "Chip module",
        "Global config",
        "Overlay mode",
        "Scl id", "SCL ID")
{
    int32 ret       = CLI_SUCCESS;
    ctc_global_overlay_decap_mode_t decap_mode;

    sal_memset(&decap_mode, 0, sizeof(decap_mode));

    CTC_CLI_GET_UINT8("scl id", decap_mode.scl_id, argv[0]);

    if(g_ctcs_api_en)
    {
         ret = ctcs_global_ctl_get(g_api_ldev, CTC_GLOBAL_OVERLAY_DECAP_MODE, &decap_mode);
    }
    else
    {
        ret = ctc_global_ctl_get(CTC_GLOBAL_OVERLAY_DECAP_MODE, &decap_mode);
    }

    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("vxlan decap mode  : %u\n",decap_mode.vxlan_mode);
    ctc_cli_out("nvgre decap mode  : %u\n",decap_mode.nvgre_mode);

    return ret;

}
CTC_CLI(ctc_cli_chip_show_property,
        ctc_cli_chip_show_property_cmd,
        "show chip property (phy-scan-en | i2c-scan-en | mac-led-en | phy-scan-para (mdio-ctlr-id ID|) | i2c-scan-para (i2c-ctlr-id ID |) | \
        xpipe-mode | (phy-sample-offset | phy-sample-edge) bus ID | io-wr-dis | pll-lock-status (core| serdes SERDES_ID)) ",
        CTC_CLI_SHOW_STR,
        "Chip module",
        "Property",
        "Phy scan enable",
        "I2c scan enable",
        "Mac led enable",
        "Phy scan parameter",
        "MDIO controller ID",
        "ID",
        "I2c scan parameter",
        "I2c master id",
        "ID",
        "Xpipe mode",
        "Phy sample offset",
        "Phy sample edge",
        "Phy bus",
        "Bus id",
        "IO write disable",
        "Pll lock status",
        "Core pll lock status",
        "Serdes pll lock status",
        "Serdes id")
{
    uint8 index = 0;
    
    int32 ret = CLI_SUCCESS;
    uint32 type = 0;
    bool enable = FALSE;
    uint32 mode = 0;



    index = CTC_CLI_GET_ARGC_INDEX("phy-scan-en");
    if (0xFF != index)
    {
        type = CTC_CHIP_PHY_SCAN_EN;
        if(g_ctcs_api_en)
        {
            ret = ctcs_chip_get_property(g_api_ldev, type, &enable);
        }
        else
        {
            ret = ctc_chip_get_property(g_api_ldev, type, &enable);
        }
        if (ret < 0)
        {
            ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
            return CLI_ERROR;
        }

        ctc_cli_out("%-34s:  %u\n", "Phy-scan-en", enable);
    }

    index = CTC_CLI_GET_ARGC_INDEX("i2c-scan-en");
    if (0xFF != index)
    {
        type = CTC_CHIP_I2C_SCAN_EN;
        if(g_ctcs_api_en)
        {
            ret = ctcs_chip_get_property(g_api_ldev, type, &enable);
        }
        else
        {
            ret = ctc_chip_get_property(g_api_ldev, type, &enable);
        }
        if (ret < 0)
        {
            ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
            return CLI_ERROR;
        }

        ctc_cli_out("%-34s:  %u\n", "I2c-scan-en", enable);
    }

    index = CTC_CLI_GET_ARGC_INDEX("mac-led-en");
    if (0xFF != index)
    {
        type = CTC_CHIP_MAC_LED_EN;
        if(g_ctcs_api_en)
        {
            ret = ctcs_chip_get_property(g_api_ldev, type, &enable);
        }
        else
        {
            ret = ctc_chip_get_property(g_api_ldev, type, &enable);
        }
        if (ret < 0)
        {
            ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
            return CLI_ERROR;
        }

        ctc_cli_out("%-34s:  %u\n", "Mac-led-en", enable);
    }

    index = CTC_CLI_GET_ARGC_INDEX("phy-scan-para");
    if (0xFF != index)
    {
        ctc_chip_phy_scan_ctrl_t mdio_scan_para;

        sal_memset(&mdio_scan_para, 0, sizeof(ctc_chip_phy_scan_ctrl_t));

        index = CTC_CLI_GET_ARGC_INDEX("mdio-ctlr-id");
        if (0xFF != index)
        {
            CTC_CLI_GET_UINT8("mdio control id", mdio_scan_para.mdio_ctlr_id, argv[index + 1]);
        }

        type = CTC_CHIP_PHY_SCAN_PARA;
        if(g_ctcs_api_en)
        {
            ret = ctcs_chip_get_property(g_api_ldev, type, &mdio_scan_para);
        }
        else
        {
            ret = ctc_chip_get_property(g_api_ldev, type, &mdio_scan_para);
        }
        if (ret < 0)
        {
            ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
            return CLI_ERROR;
        }

        ctc_cli_out("%-34s:  %u\n",     "Mdio control id", mdio_scan_para.mdio_ctlr_id);
        ctc_cli_out("%-34s:  %u\n",     "Scan interval", mdio_scan_para.scan_interval);
        ctc_cli_out("%-34s:  0x%x\n",   "Mdio use phy0", mdio_scan_para.mdio_use_phy0);
        ctc_cli_out("%-34s:  0x%x\n",   "Mdio use phy1", mdio_scan_para.mdio_use_phy1);
        ctc_cli_out("%-34s:  %s\n",     "Mdio control type", mdio_scan_para.mdio_ctlr_type?"XG":"GE");
        if (CTC_CHIP_MDIO_XG == mdio_scan_para.mdio_ctlr_type)
        {
            ctc_cli_out("%-34s:  0x%x\n",   "Xgphy link bitmask", mdio_scan_para.xgphy_link_bitmask);
            ctc_cli_out("%-34s:  %u\n",     "Xgphy scan twice", mdio_scan_para.xgphy_scan_twice);
        }
        ctc_cli_out("%-34s:  0x%x\n",   "Scan phy bitmap0", mdio_scan_para.scan_phy_bitmap0);
        ctc_cli_out("%-34s:  0x%x\n",   "Scan phy bitmap1", mdio_scan_para.scan_phy_bitmap1);
    }

    index = CTC_CLI_GET_ARGC_INDEX("i2c-scan-para");
    if (0xFF != index)
    {
        ctc_chip_i2c_scan_t i2c_scan_para;

        sal_memset(&i2c_scan_para, 0, sizeof(ctc_chip_i2c_scan_t));

        index = CTC_CLI_GET_ARGC_INDEX("i2c-ctlr-id");
        if (0xFF != index)
        {
            CTC_CLI_GET_UINT8("i2c control id", i2c_scan_para.ctl_id, argv[index + 1]);
        }

        type = CTC_CHIP_I2C_SCAN_PARA;
        if(g_ctcs_api_en)
        {
            ret = ctcs_chip_get_property(g_api_ldev, type, &i2c_scan_para);
        }
        else
        {
            ret = ctc_chip_get_property(g_api_ldev, type, &i2c_scan_para);
        }
        if (ret < 0)
        {
            ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
            return CLI_ERROR;
        }

        ctc_cli_out("%-34s:  %u\n",     "I2c control id", i2c_scan_para.ctl_id);
        ctc_cli_out("%-34s:  %u\n",     "Slave dev addr", i2c_scan_para.dev_addr);
        ctc_cli_out("%-34s:  %u\n",     "Offset", i2c_scan_para.offset);
        ctc_cli_out("%-34s:  %u\n",     "Scan length", i2c_scan_para.length);
        ctc_cli_out("%-34s:  0x%x\n",   "Scan interval", i2c_scan_para.interval);
        ctc_cli_out("%-34s:  %u\n",     "I2c switch id", i2c_scan_para.i2c_switch_id);
        ctc_cli_out("%-34s:  0x%x\n",   "Scan bitmap0", i2c_scan_para.slave_bitmap[0]);
        ctc_cli_out("%-34s:  0x%x\n",   "Scan bitmap1", i2c_scan_para.slave_bitmap[1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("phy-sample-offset");
    if (0xFF != index)
    {
        ctc_chip_mdio_para_t mdio_para;

        sal_memset(&mdio_para, 0, sizeof(ctc_chip_mdio_para_t));

        index = CTC_CLI_GET_ARGC_INDEX("bus");
        if (0xFF != index)
        {
            CTC_CLI_GET_UINT8("mdio bus id", mdio_para.bus, argv[index + 1]);
        }

        type = CTC_CHIP_PROP_PHY_SAMPLE_OFFSET;
        if(g_ctcs_api_en)
        {
            ret = ctcs_chip_get_property(g_api_ldev, type, &mdio_para);
        }
        else
        {
            ret = ctc_chip_get_property(g_api_ldev, type, &mdio_para);
        }
        if (ret < 0)
        {
            ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
            return CLI_ERROR;
        }

        ctc_cli_out("%-34s:  %u\n",     "Mdio bus id", mdio_para.bus);
        ctc_cli_out("%-34s: ",     "Sample offset");
        CTC_IS_BIT_SET(mdio_para.value, 15)?ctc_cli_out("-"): ctc_cli_out(" ");
        ctc_cli_out("%u\n",     mdio_para.value&0x7FFF);
    }

    index = CTC_CLI_GET_ARGC_INDEX("phy-sample-edge");
    if (0xFF != index)
    {
        ctc_chip_mdio_para_t mdio_para;

        sal_memset(&mdio_para, 0, sizeof(ctc_chip_mdio_para_t));

        index = CTC_CLI_GET_ARGC_INDEX("bus");
        if (0xFF != index)
        {
            CTC_CLI_GET_UINT8("mdio bus id", mdio_para.bus, argv[index + 1]);
        }

        type = CTC_CHIP_PROP_PHY_SAMPLE_EDGE;
        if(g_ctcs_api_en)
        {
            ret = ctcs_chip_get_property(g_api_ldev, type, &mdio_para);
        }
        else
        {
            ret = ctc_chip_get_property(g_api_ldev, type, &mdio_para);
        }
        if (ret < 0)
        {
            ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
            return CLI_ERROR;
        }

        ctc_cli_out("%-34s:  %u\n",     "Mdio bus id", mdio_para.bus);
        ctc_cli_out("%-34s:  %u\n",     "Sample edge", mdio_para.value);
    }

    index = CTC_CLI_GET_ARGC_INDEX("xpipe-mode");
    if (0xFF != index)
    {
        if (g_ctcs_api_en)
        {
            ret = ctcs_global_ctl_get(g_api_ldev, CTC_GLOBAL_XPIPE_MODE, &mode);
        }
        else
        {
            ret = ctc_global_ctl_get(CTC_GLOBAL_XPIPE_MODE, &mode);
        }
        if (ret < 0)
        {
            ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
            return CLI_ERROR;
        }
        ctc_cli_out("Xpipe mode  : %u\n", mode);
    }

    index = CTC_CLI_GET_ARGC_INDEX("io-wr-dis");
    if (0xFF != index)
    {
        uint32 enable=0;
        type = CTC_CHIP_PROP_IO_WR_DIS;

        if(g_ctcs_api_en)
        {
             ret = ctcs_chip_get_property(g_api_ldev, type, (void*)&enable);
        }
        else
        {
            ret = ctc_chip_get_property(g_api_ldev, type, (void*)&enable);
        }
        if (ret < 0)
        {
            ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
            return CLI_ERROR;
        }

        ctc_cli_out("%-34s:  %s\n", "Register write disable", enable?"enable":"disable");
    }

    index = CTC_CLI_GET_ARGC_INDEX("pll-lock-status");
    if (0xFF != index)
    {
        ctc_chip_pll_lock_status_t pll_lock_status;

        sal_memset(&pll_lock_status, 0, sizeof(pll_lock_status));
        type = CTC_CHIP_PROP_PLL_LOCK_STATUS;
        index = CTC_CLI_GET_ARGC_INDEX("core");
        if (0xFF != index)
        {
            pll_lock_status.type = CTC_CHIP_PLL_LOCK_TYPE_CORE;
        }

        index = CTC_CLI_GET_ARGC_INDEX("serdes");
        if (0xFF != index)
        {
            pll_lock_status.type = CTC_CHIP_PLL_LOCK_TYPE_SERDES;
            CTC_CLI_GET_UINT16("serdes id", pll_lock_status.serdes_id, argv[index + 1]);
        }

        if(g_ctcs_api_en)
        {
             ret = ctcs_chip_get_property(g_api_ldev, type, (void*)&pll_lock_status);
        }
        else
        {
            ret = ctc_chip_get_property(g_api_ldev, type, (void*)&pll_lock_status);
        }
        if (ret < 0)
        {
            ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
            return CLI_ERROR;
        }

        if (CTC_CHIP_PLL_LOCK_TYPE_CORE == pll_lock_status.type)
        {
            ctc_cli_out("%-34s:  %s\n",     "Core pll Lock status", pll_lock_status.status?"lock":"unlock");
        }
        else
        {
            ctc_cli_out("%-34s: %s %u %s\n",     "Serdes pll Lock status", "serdes id", pll_lock_status.serdes_id, pll_lock_status.status?"lock":"unlock");
        }
    }

    return ret;
}
CTC_CLI(ctc_cli_chip_xpipe_mode,
        ctc_cli_chip_xpipe_mode_cmd,
        "chip xpipe mode VALUE ",
        "Chip module",
        "Xpipe function",
        "Mode",
        "Value")
{
    int32 ret = 0;
    uint32 value = 0;

    CTC_CLI_GET_UINT32("value", value, argv[0]);

    if(g_ctcs_api_en)
    {
        ret = ctcs_global_ctl_set(g_api_ldev, CTC_GLOBAL_XPIPE_MODE, &value);
    }
    else
    {
        ret = ctc_global_ctl_set(CTC_GLOBAL_XPIPE_MODE, &value);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;
}

CTC_CLI(ctc_cli_chip_xpipe_action,
        ctc_cli_chip_xpipe_action_cmd,
        "chip xpipe priority PRIORITY (color COLOR|) (high-pri LEVEL) ",
        "Chip module",
        "Xpipe function",
        "Packet priority",
        "Priority value",
        "Packet color",
        "Color value",
        "High priority channel",
        "High priority level value, support three level, the value is 0-2, the higher the number, the higher the priority")
{
    int32 ret = 0;
    
    uint8 index = 0;
    ctc_register_xpipe_action_t action;

    sal_memset(&action, 0, sizeof(ctc_register_xpipe_action_t));


    CTC_CLI_GET_UINT8("priority", action.priority, argv[0]);

    index = CTC_CLI_GET_ARGC_INDEX("high-pri");
    if (0xFF != index)
    {
        CTC_CLI_GET_INTEGER("level", action.is_high_pri, argv[index + 1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("color");
    if (0xFF != index)
    {
        CTC_CLI_GET_INTEGER("color", action.color, argv[index + 1]);
    }

    if(g_ctcs_api_en)
    {
        ret = ctcs_global_ctl_set(g_api_ldev, CTC_GLOBAL_XPIPE_ACTION, &action);
    }
    else
    {
        ret = ctc_global_ctl_set(CTC_GLOBAL_XPIPE_ACTION, &action);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }
    return ret;
}

CTC_CLI(ctc_cli_chip_get_xpipe_action,
        ctc_cli_chip_get_xpipe_action_cmd,
        "show chip xpipe priority PRIORITY color COLOR ",
        CTC_CLI_SHOW_STR,
        "Chip module",
        "Xpipe function",
        "Packet priority",
        "Priority value",
        "Packet color",
        "Color value")
{
    int32 ret = 0;
    ctc_register_xpipe_action_t action;


    CTC_CLI_GET_UINT8("priority", action.priority, argv[0]);
    CTC_CLI_GET_UINT8("color", action.color, argv[1]);

    if(g_ctcs_api_en)
    {
        ret = ctcs_global_ctl_get(g_api_ldev, CTC_GLOBAL_XPIPE_ACTION, &action);
    }
    else
    {
        ret = ctc_global_ctl_get(CTC_GLOBAL_XPIPE_ACTION, &action);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }
    ctc_cli_out("Priority: %u color: %u, high_priority_level: %u\n", action.priority, action.color, action.is_high_pri);
    return ret;
}

CTC_CLI(ctc_cli_chip_set_xpipe_classify,
        ctc_cli_chip_set_xpipe_classify_cmd,
        "chip xpipe classify index INDEX entry-valid ENTRY_VALID {" CTC_CLI_CHIP_XPIPE_KEY_FIELD_STR "| obm-priority VALUE |}",
        "Chip module",
        "Xpipe function",
        "Xpipe pkt classify",
        "Entry index",
        "Value",
        "Entry valid",
        "Value",
        CTC_CLI_CHIP_XPIPE_KEY_FIELD_DESC,
        "Obm-priority",
        "<0-3>")
{
    int32 ret = 0;
    
    uint8 index = 0;
    uint8 arg_cnt = 0;
    mac_addr_t  mac_da_addr = {0};
    mac_addr_t  mac_da_addr_mask = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
    ctc_field_key_t key_field[CTC_CLI_CHIP_XPIPE_KEY_FIELD_NUM];
    ctc_field_key_t* p_field = &key_field[0];
    ctc_register_xpipe_classify_t classify;

    sal_memset(&classify, 0, sizeof(classify));
    sal_memset(&key_field, 0, sizeof(ctc_field_key_t)*CTC_CLI_CHIP_XPIPE_KEY_FIELD_NUM);
    classify.field_list = &key_field[0];
    CTC_CLI_GET_UINT8("entry-index", classify.index, argv[0]);
    CTC_CLI_GET_UINT8("entry-valid", classify.valid, argv[1]);

    index = CTC_CLI_GET_ARGC_INDEX("obm-priority");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT8("obm-priority", classify.obm_priority, argv[index + 1]);
    }

    for (index=0; index<CTC_CLI_CHIP_XPIPE_KEY_FIELD_NUM; index++)
    {
        key_field[index].mask = 0xFFFFFFFF;
    }
    CTC_CLI_CHIP_XPIPE_KEY_FIELD_SET(p_field,CTC_CLI_CHIP_XPIPE_KEY_ARG_CHECK(arg_cnt,CTC_CLI_CHIP_XPIPE_KEY_FIELD_NUM, p_field));
    classify.field_cnt = arg_cnt;

    if(g_ctcs_api_en)
    {
        ret = ctcs_global_ctl_set(g_api_ldev, CTC_GLOBAL_XPIPE_CLASSIFY, &classify);
    }
    else
    {
        ret = ctc_global_ctl_set(CTC_GLOBAL_XPIPE_CLASSIFY, &classify);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }
    return ret;
}

CTC_CLI(ctc_cli_chip_get_xpipe_classify,
        ctc_cli_chip_get_xpipe_classify_cmd,
        "show chip xpipe classify index INDEX (gport GPORT|)",
        CTC_CLI_SHOW_STR,
        "Chip module",
        "Xpipe function",
        "Xpipe pkt classify",
        "Entry index",
        "Value",
        "Gport",
        "Value")
{
    int32 ret = 0;
    uint8 index = 0;
    uint8 loop = 0;
    mac_addr_t  mac_da_addr = {0};
    mac_addr_t  mac_da_addr_mask = {0};
    ctc_field_key_t key_field[CTC_CLI_CHIP_XPIPE_KEY_FIELD_NUM];
    uint8 key_type[CTC_CLI_CHIP_XPIPE_KEY_FIELD_NUM] = {CTC_FIELD_KEY_MAC_DA,    CTC_FIELD_KEY_MACDA_HIT, CTC_FIELD_KEY_PKT_STAG_VALID,
                                                        CTC_FIELD_KEY_SVLAN_ID,  CTC_FIELD_KEY_STAG_COS,  CTC_FIELD_KEY_ETHER_TYPE,
                                                        CTC_FIELD_KEY_IS_IP_PKT, CTC_FIELD_KEY_IP_DSCP,   CTC_FIELD_KEY_IP_PROTOCOL,
                                                        CTC_FIELD_KEY_UDF,       CTC_FIELD_KEY_PORT};
    ctc_register_xpipe_classify_t classify;

    sal_memset(&classify, 0, sizeof(classify));
    sal_memset(key_field, 0, sizeof(key_field));

    CTC_CLI_GET_UINT8("entry-index", classify.index, argv[0]);

    classify.field_cnt = CTC_CLI_CHIP_XPIPE_KEY_FIELD_NUM - 1;
    classify.field_list = &key_field[0];
    for(loop = 0; loop < CTC_CLI_CHIP_XPIPE_KEY_FIELD_NUM - 1; loop++)
    {
        classify.field_list[loop].type = key_type[loop];
        if(key_type[loop] == CTC_FIELD_KEY_MAC_DA)
        {
            classify.field_list[loop].ext_data = mac_da_addr;
            classify.field_list[loop].ext_mask = mac_da_addr_mask;
        }
    }

    index = CTC_CLI_GET_ARGC_INDEX("gport");
    if (0xFF != index)
    {
        classify.field_cnt += 1;
        classify.field_list[CTC_CLI_CHIP_XPIPE_KEY_FIELD_NUM - 1].type = key_type[CTC_CLI_CHIP_XPIPE_KEY_FIELD_NUM - 1];
        CTC_CLI_GET_UINT32("gport", classify.field_list[CTC_CLI_CHIP_XPIPE_KEY_FIELD_NUM - 1].data, argv[index + 1]);
    }

    if(g_ctcs_api_en)
    {
        ret = ctcs_global_ctl_get(g_api_ldev, CTC_GLOBAL_XPIPE_CLASSIFY, &classify);
    }
    else
    {
        ret = ctc_global_ctl_get(CTC_GLOBAL_XPIPE_CLASSIFY, &classify);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("entry-index %d, entry-valid %d, Key:\n", classify.index , classify.valid );
    ctc_cli_out("-------------------------------------\n");
    for(loop = 0; loop < CTC_CLI_CHIP_XPIPE_KEY_FIELD_NUM - 1; loop++)
    {
        if(key_field[loop].type == CTC_FIELD_KEY_MAC_DA)
        {
            if(classify.index == 0)
            {
            ctc_cli_out("%-19s : %x.%x.%x/%X.%X.%X\n", ctc_cli_chip_get_type(key_field[loop].type),
                sal_ntohs(*(unsigned short*)key_field[loop].ext_data),sal_ntohs(*((unsigned short*)(key_field[loop].ext_data) + 1)),sal_ntohs(*((unsigned short*)(key_field[loop].ext_data) + 2)),
                sal_ntohs(*(unsigned short*)key_field[loop].ext_mask),sal_ntohs(*((unsigned short*)(key_field[loop].ext_mask) + 1)),sal_ntohs(*((unsigned short*)(key_field[loop].ext_mask) + 2)));
            }
        }
        else
        {
            ctc_cli_out("%-19s : 0x%x/0x%x\n", ctc_cli_chip_get_type(key_field[loop].type),
                        key_field[loop].data, key_field[loop].mask);
        }
    }
    if (classify.field_cnt == CTC_CLI_CHIP_XPIPE_KEY_FIELD_NUM)
    {
        ctc_cli_out("-------------------------------------\n");
        ctc_cli_out("%-19s : %d\n", "obm-priority", classify.obm_priority);
    }
    ctc_cli_out("-------------------------------------\n");
    return ret;
}

CTC_CLI(ctc_cli_chip_hecmp_mem,
        ctc_cli_chip_hecmp_mem_cmd,
        "chip global-cfg h-ecmp max member VAL ",
        "Chip module",
        "Global config",
        "H-ecmp",
        "Max",
        "Member",
        "Value")
{
    int32 ret = 0;
    
    uint32 max_num = 0;
    CTC_CLI_GET_UINT32("max num", max_num, argv[0]);

    if(g_ctcs_api_en)
    {
        ret = ctcs_global_ctl_set(g_api_ldev, CTC_GLOBAL_MAX_HECMP_MEM, &max_num);
    }
    else
    {
        ret = ctc_global_ctl_set(CTC_GLOBAL_MAX_HECMP_MEM, &max_num);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }
    return ret;
}

CTC_CLI(ctc_cli_chip_get_hecmp_max_mem,
        ctc_cli_chip_get_hecmp_max_mem_cmd,
        "show chip global-cfg h-ecmp max member ",
        CTC_CLI_SHOW_STR,
        "Chip module",
        "Global config",
        "H-ecmp",
        "Max",
        "Member")
{
    int32 ret = 0;
    uint32 max_mem = 0;

    if(g_ctcs_api_en)
    {
        ret = ctcs_global_ctl_get(g_api_ldev, CTC_GLOBAL_MAX_HECMP_MEM, &max_mem);
    }
    else
    {
        ret = ctc_global_ctl_get(CTC_GLOBAL_MAX_HECMP_MEM, &max_mem);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }
    ctc_cli_out("H-ecmp max member: %u\n", max_mem);
    return ret;
}

CTC_CLI(ctc_cli_chip_serdes_dfe,
        ctc_cli_chip_serdes_dfe_cmd,
        "chip serdes SERDES dfe (enable|disable) ",
        "Chip module",
        "Serdes",
        "Serdes id",
        "DFE",
        "Enable",
        "Disable")
{
    int32 ret       = CLI_SUCCESS;
    ctc_chip_serdes_cfg_t  dfe_param;
    uint16 serdes_id = 0;
    
    uint8 index = 0;
    sal_memset(&dfe_param, 0, sizeof(ctc_chip_serdes_cfg_t));
    CTC_CLI_GET_UINT16_RANGE("serdes", serdes_id, argv[0], 0, CTC_MAX_UINT16_VALUE);
    dfe_param.serdes_id = serdes_id;
    index = CTC_CLI_GET_ARGC_INDEX("disable");
    if (0xFF != index)
    {
        dfe_param.value = 0;
    }
    index = CTC_CLI_GET_ARGC_INDEX("enable");
    if (0xFF != index)
    {
        dfe_param.value = 1;
    }

    if(g_ctcs_api_en)
    {
        ret = ctcs_chip_set_property(g_api_ldev, CTC_CHIP_PROP_SERDES_DFE, (void*)&dfe_param);
    }
    else
    {
        ret = ctc_chip_set_property(g_api_ldev, CTC_CHIP_PROP_SERDES_DFE, (void*)&dfe_param);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }
    return ret;
}

CTC_CLI(ctc_cli_chip_serdes_optical_mode,
        ctc_cli_chip_serdes_optical_mode_cmd,
        "chip serdes SERDES optical-mode (enable|disable) ",
        "Chip module",
        "Serdes",
        "Serdes id",
        "Optical-mode",
        "Enable",
        "Disable")
{
    int32 ret       = CLI_SUCCESS;
    ctc_chip_serdes_cfg_t  optical_param;
    uint16 serdes_id = 0;
    
    uint8 index = 0;
    sal_memset(&optical_param, 0, sizeof(ctc_chip_serdes_cfg_t));
    CTC_CLI_GET_UINT16_RANGE("serdes", serdes_id, argv[0], 0, CTC_MAX_UINT16_VALUE);
    optical_param.serdes_id = serdes_id;
    index = CTC_CLI_GET_ARGC_INDEX("disable");
    if (0xFF != index)
    {
        optical_param.value = 0;
    }
    index = CTC_CLI_GET_ARGC_INDEX("enable");
    if (0xFF != index)
    {
        optical_param.value = 1;
    }

    if(g_ctcs_api_en)
    {
        ret = ctcs_chip_set_property(g_api_ldev, CTC_CHIP_PROP_SERDES_OPTICAl_MODE, (void*)&optical_param);
    }
    else
    {
        ret = ctc_chip_set_property(g_api_ldev, CTC_CHIP_PROP_SERDES_OPTICAl_MODE, (void*)&optical_param);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }
    return ret;
}

CTC_CLI(ctc_cli_chip_serdes_direction_enable,
        ctc_cli_chip_serdes_direction_enable_cmd,
        "chip serdes SERDES direction (ingress|egress|both) (enable|disable) (lchip LCHIP|)",
        "chip module",
        "serdes",
        "serdes id",
        "Direction",
        "Ingress",
        "Egress",
        "Both direction",
        "Enable",
        "Disable",
        CTC_CLI_LCHIP_ID_STR,
        CTC_CLI_LCHIP_ID_VALUE)
{
    int32 ret = CLI_SUCCESS;
    ctc_chip_serdes_cfg_t  chip_serdes_cfg;
    uint16 serdes_id = 0;
    uint8 lchip = 0;
    uint8 index = 0;
    sal_memset(&chip_serdes_cfg, 0, sizeof(ctc_chip_serdes_cfg_t));

    CTC_CLI_GET_UINT16_RANGE("serdes", serdes_id, argv[0], 0, CTC_MAX_UINT16_VALUE);
    chip_serdes_cfg.serdes_id = serdes_id;

    index = CTC_CLI_GET_ARGC_INDEX("ingress");
    if (INDEX_VALID(index))
    {
        chip_serdes_cfg.dir = CTC_INGRESS;
    }

    index = CTC_CLI_GET_ARGC_INDEX("egress");
    if (INDEX_VALID(index))
    {
        chip_serdes_cfg.dir = CTC_EGRESS;
    }

    index = CTC_CLI_GET_ARGC_INDEX("both");
    if (INDEX_VALID(index))
    {
        chip_serdes_cfg.dir = CTC_BOTH_DIRECTION;
    }

    index = CTC_CLI_GET_ARGC_INDEX("disable");
    if (INDEX_VALID(index))
    {
        chip_serdes_cfg.value = 0;
    }
    index = CTC_CLI_GET_ARGC_INDEX("enable");
    if (INDEX_VALID(index))
    {
        chip_serdes_cfg.value = 1;
    }
    index = CTC_CLI_GET_ARGC_INDEX("lchip");
    if (INDEX_VALID(index))
    {
        CTC_CLI_GET_UINT8("lchip", lchip, argv[index + 1]);
    }
    if(g_ctcs_api_en)
    {
        ret = ctcs_chip_set_property(g_api_ldev, CTC_CHIP_PROP_SERDES_EN, (void*)&chip_serdes_cfg);
    }
    else
    {
        ret = ctc_chip_set_property(g_api_ldev, CTC_CHIP_PROP_SERDES_EN, (void*)&chip_serdes_cfg);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }
    return ret;
}

CTC_CLI(ctc_cli_chip_serdes_direction_reset,
        ctc_cli_chip_serdes_direction_reset_cmd,
        "chip serdes SERDES direction (ingress|egress|both) reset VALUE (lchip LCHIP|)",
        "chip module",
        "serdes",
        "serdes id",
        "Direction",
        "Ingress",
        "Egress",
        "Both direction",
        "Reset",
        "Value",
        CTC_CLI_LCHIP_ID_STR,
        CTC_CLI_LCHIP_ID_VALUE)
{
    int32 ret = CLI_SUCCESS;
    ctc_chip_serdes_cfg_t  chip_serdes_cfg;
    uint16 serdes_id = 0;
    uint8 lchip = 0;
    uint8 index = 0;
    sal_memset(&chip_serdes_cfg, 0, sizeof(ctc_chip_serdes_cfg_t));

    CTC_CLI_GET_UINT16_RANGE("serdes", serdes_id, argv[0], 0, CTC_MAX_UINT16_VALUE);
    chip_serdes_cfg.serdes_id = serdes_id;

    index = CTC_CLI_GET_ARGC_INDEX("ingress");
    if (INDEX_VALID(index))
    {
        chip_serdes_cfg.dir = CTC_INGRESS;
    }

    index = CTC_CLI_GET_ARGC_INDEX("egress");
    if (INDEX_VALID(index))
    {
        chip_serdes_cfg.dir = CTC_EGRESS;
    }

    index = CTC_CLI_GET_ARGC_INDEX("both");
    if (INDEX_VALID(index))
    {
        chip_serdes_cfg.dir = CTC_BOTH_DIRECTION;
    }

    CTC_CLI_GET_UINT16("value", chip_serdes_cfg.value, argv[index+1]);

    index = CTC_CLI_GET_ARGC_INDEX("lchip");
    if (INDEX_VALID(index))
    {
        CTC_CLI_GET_UINT8("lchip", lchip, argv[index + 1]);
    }
    if(g_ctcs_api_en)
    {
        ret = ctcs_chip_set_property(g_api_lchip, CTC_CHIP_PROP_SERDES_RESET, (void*)&chip_serdes_cfg);
    }
    else
    {
        ret = ctc_chip_set_property(lchip, CTC_CHIP_PROP_SERDES_RESET, (void*)&chip_serdes_cfg);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }
    return ret;
}

#if defined E_UNIT && (FEATURE_MODE == 0)
CTC_CLI(ctc_cli_chip_load_eunit_image,
        ctc_cli_chip_load_eunit_image_cmd,
        "chip load eunit EUNIT file FILE",
        "Chip module",
        "Load",
        "Eunit",
        "Eunit id",
        "File",
        "File name")
{
    int32 ret = CLI_SUCCESS;
    uint8 unit = 0;
    ctc_eunit_install_t eunit;
    sal_memset (&eunit,0,sizeof(ctc_eunit_install_t));

    CTC_CLI_GET_UINT8_RANGE("eunit", unit, argv[0], 0, CTC_MAX_UINT8_VALUE);
    eunit.bin_file = argv[1];
    ctc_cli_out("load file: %s \n", argv[1]);

    if(g_ctcs_api_en)
    {
        ret = ctcs_chip_eunit_install(g_api_ldev, unit, &eunit);
    }
    else
    {
        ret = ctc_chip_eunit_install(unit, &eunit);
    }

    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_chip_unload_eunit_image,
        ctc_cli_chip_unload_eunit_image_cmd,
        "chip unload eunit EUNIT",
        "Chip module",
        "Un Load",
        "Eunit",
        "Eunit id")
{
    int32 ret = CLI_SUCCESS;
    uint8 unit = 0;

    CTC_CLI_GET_UINT8_RANGE("eunit", unit, argv[0], 0, CTC_MAX_UINT8_VALUE);
    if(g_ctcs_api_en)
    {
        ret = ctcs_chip_eunit_uninstall(g_api_ldev, unit);
    }
    else
    {
        ret = ctc_chip_eunit_uninstall(unit);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return CLI_SUCCESS;
}
#endif

CTC_CLI(ctc_cli_chip_peri_drv_cap,
        ctc_cli_chip_peri_drv_cap_cmd,
        "chip peri drv-cap (mdio BUS-ID | i2c CTL-ID |led ) VALUE ",
        "Chip module",
        "Peri",
        "Drive capability",
        "Mdio",
        "Phy bus id",
        "I2c master",
        "Control id value",
        "Mac Led",
        "Drive capability value")
{
    int32 ret       = CLI_SUCCESS;
    
    uint8 index = 0;
    ctc_chip_peri_drv_t peri_drv;
    
    sal_memset(&peri_drv, 0, sizeof(ctc_chip_peri_drv_t));
    index = CTC_CLI_GET_ARGC_INDEX("mdio");
    if (0xFF != index)
    {
        peri_drv.type = CTC_CHIP_PERI_MDIO_TYPE;
        CTC_CLI_GET_UINT8("bus", peri_drv.bus, argv[index + 1]);
        CTC_CLI_GET_UINT32("value", peri_drv.val, argv[index + 2]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("i2c");
    if (0xFF != index)
    {
        peri_drv.type = CTC_CHIP_PERI_I2C_TYPE;
        CTC_CLI_GET_UINT8("contrl id", peri_drv.ctl_id, argv[index + 1]);
        CTC_CLI_GET_UINT32("value", peri_drv.val, argv[index + 2]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("led");
    if (0xFF != index)
    {
        peri_drv.type = CTC_CHIP_PERI_MAC_LED_TYPE;
        CTC_CLI_GET_UINT32("value", peri_drv.val, argv[index + 1]);
    }



    if(g_ctcs_api_en)
    {
         ret = ctcs_chip_set_property(g_api_ldev, CTC_CHIP_PROP_PERI_DRV_CAP, &peri_drv);
    }
    else
    {
        ret = ctc_chip_set_property(g_api_ldev, CTC_CHIP_PROP_PERI_DRV_CAP, &peri_drv);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return ret;
}

CTC_CLI(ctc_cli_chip_show_peri_drv_cap,
        ctc_cli_chip_show_peri_drv_cap_cmd,
        "show chip peri drv-cap (mdio BUS-ID | i2c CTL-ID |led ) ",
        "Show",
        "Chip module",
        "Peri",
        "Drive capability",
        "Mdio",
        "Bus id",
        "I2c master",
        "Control id value",
        "Mac Led")
{
    int32 ret       = CLI_SUCCESS;
    
    uint8 index = 0;
    ctc_chip_peri_drv_t peri_drv;

    sal_memset(&peri_drv, 0, sizeof(ctc_chip_peri_drv_t));
    index = CTC_CLI_GET_ARGC_INDEX("mdio");
    if (0xFF != index)
    {
        peri_drv.type = CTC_CHIP_PERI_MDIO_TYPE;
        CTC_CLI_GET_UINT8("bus", peri_drv.bus, argv[index + 1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("i2c");
    if (0xFF != index)
    {
        peri_drv.type = CTC_CHIP_PERI_I2C_TYPE;
        CTC_CLI_GET_UINT8("contrl id", peri_drv.ctl_id, argv[index + 1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("led");
    if (0xFF != index)
    {
        peri_drv.type = CTC_CHIP_PERI_MAC_LED_TYPE;
    }



    if(g_ctcs_api_en)
    {
         ret = ctcs_chip_get_property(g_api_ldev, CTC_CHIP_PROP_PERI_DRV_CAP, &peri_drv);
    }
    else
    {
        ret = ctc_chip_get_property(g_api_ldev, CTC_CHIP_PROP_PERI_DRV_CAP, &peri_drv);
    }
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    if (CTC_CHIP_PERI_MDIO_TYPE == peri_drv.type)
    {
        ctc_cli_out("%-34s:\n",     "MDIO");
        ctc_cli_out("%-34s:  %u\n",     "Mdio bus id", peri_drv.bus);
    }
    else if (CTC_CHIP_PERI_I2C_TYPE == peri_drv.type)
    {
        ctc_cli_out("%-34s:\n",     "I2C");
        ctc_cli_out("%-34s:  %u\n",     "I2c contrl id", peri_drv.ctl_id);
    }
    else
    {
        ctc_cli_out("%-34s:\n",     "MAC LED");
    }

    ctc_cli_out("%-34s:  %u\n",     "Drive cap value", peri_drv.val);

    return ret;
}

int32
ctc_chip_cli_init(void)
{

    install_element(CTC_SDK_MODE, &ctc_cli_chip_debug_on_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_debug_off_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_show_debug_cmd);

    install_element(CTC_SDK_MODE, &ctc_cli_datapath_debug_on_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_datapath_debug_off_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_datapath_show_debug_cmd);
    install_element(CTC_SDK_MODE,  &ctc_cli_chip_show_chip_clock_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_phy_scan_para_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_phy_scan_en_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_read_i2c_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_write_i2c_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_i2c_scan_para_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_i2c_scan_en_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_read_i2c_buffer_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_i2c_clock_frequency_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_show_i2c_clock_frequency_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_mac_led_mode_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_mac_led_en_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_cpu_led_en_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_show_cpu_led_en_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_mac_led_clock_frequency_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_show_mac_led_clock_frequency_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_gpio_operation_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_set_gpio_operation_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_get_gpio_operation_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_access_mode_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_serdes_mode_cmd);


    install_element(CTC_SDK_MODE, &ctc_cli_chip_discard_same_mac_or_ip_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_show_discard_same_mac_or_ip_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_global_dlb_mode_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_global_dlb_cfg_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_get_global_dlb_mode_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_get_global_dlb_cfg_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_get_global_lag_dlb_prop_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_global_lag_dlb_prop_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_global_flow_prop_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_get_global_flow_prop_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_global_acl_property_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_get_global_acl_property_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_global_scl_property_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_get_global_scl_property_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_global_cid_property_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_get_global_cid_property_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_get_global_capability_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_global_config_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_get_global_config_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_global_set_truncation_profile_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_global_get_truncation_profile_cmd);

    install_element(CTC_SDK_MODE, &ctc_cli_chip_mdio_clock_frequency_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_show_mdio_clock_frequency_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_show_sensor_value_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_serdes_param_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_serdes_poly_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_serdes_loopback_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_serdes_p_flag_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_serdes_peak_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_serdes_dpc_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_serdes_slew_rate_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_serdes_ctle_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_serdes_direction_enable_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_mem_scan_mode_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_reset_hw_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_show_reset_hw_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_mem_check_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_show_sensors_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_serdes_id_map_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_mdio_read_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_mdio_write_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_get_serdes_prop_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_serdes_prbs_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_show_device_info_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_show_gport_property_prop_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_mem_bist_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_show_global_panel_ports_cmd);

    install_element(CTC_SDK_MODE, &ctc_cli_chip_monitor_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_monitor_interval_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_show_chip_monitor_status_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_show_chip_monitor_history_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_clear_chip_monitor_history_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_lb_hash_select_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_lb_hash_set_linkagg_offset_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_lb_hash_set_ecmp_offset_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_lb_hash_set_stacking_offset_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_show_lb_hash_select_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_show_lb_hash_linkagg_offset_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_show_lb_hash_ecmp_offset_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_show_lb_hash_stacking_offset_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_show_property_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_global_log_shift_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_get_global_log_shift_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_get_global_overlay_decap_mode_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_global_overlay_decap_mode_cmd);

    install_element(CTC_SDK_MODE, &ctc_cli_chip_global_warmboot_timer_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_get_global_warmboot_timer_cmd);
	install_element(CTC_SDK_MODE, &ctc_cli_chip_xpipe_mode_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_xpipe_action_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_get_xpipe_action_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_set_xpipe_classify_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_get_xpipe_classify_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_cpu_port_en_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_show_cpu_port_en_cfg_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_hecmp_mem_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_get_hecmp_max_mem_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_phy_sample_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_serdes_dfe_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_serdes_optical_mode_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_martian_addr_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_get_martian_addr_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_set_scl_decap_offset_step_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_get_scl_decap_offset_step_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_reg_io_dis_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_im_loss_interval_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_get_im_loss_interval_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_set_mdc_voltage_mode_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_get_mdc_voltage_mode_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_set_global_prop_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_serdes_direction_reset_cmd);
#if defined E_UNIT && (FEATURE_MODE == 0)
    install_element(CTC_SDK_MODE, &ctc_cli_chip_load_eunit_image_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_unload_eunit_image_cmd);
#endif
    install_element(CTC_SDK_MODE, &ctc_cli_chip_peri_drv_cap_cmd);
    install_element(CTC_SDK_MODE, &ctc_cli_chip_show_peri_drv_cap_cmd);
    return 0;
}

